diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-08 11:42:37 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-30 15:39:04 +0200 |
| commit | 31f0a454d3dff997eb6570297e0c555d511dbdd6 (patch) | |
| tree | 54234e3237749efbd0c3ce4bf7028e7ce7ef69e8 /drivers/pinctrl | |
| parent | 9d7558ed8372c51cbed011cb1dc3eb1beee212cf (diff) | |
| download | linux-next-31f0a454d3dff997eb6570297e0c555d511dbdd6.tar.gz | |
pinctrl: renesas: r8a77995: Retain POCCTRL0 register across suspend/resume
The POC Control Register 0 (POCCTRL0) on R-Car D3 is not registered in
the pinmux_ioctrl_regs[] array. Hence it is not saved/restored during
suspend/resume, and its contents may be lost after s2ram.
This went unnoticed when improving suspend/resume support in commit
d92ee9cf8ec8d7fe ("pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register
across suspend/resume").
Fix this by moving the pinmux_ioctrl_regs[] array up, and adding the
POCCTRL0 register.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d17402b83b1f3fa0f572527c0382027bccb86205.1678271030.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/pfc-r8a77995.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c index d949ae59c757..8e4ba9c61234 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -2855,11 +2855,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; +enum ioctrl_regs { + POCCTRL0, + TDSELCTRL, +}; + +static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { + [POCCTRL0] = { 0xe6060380, }, + [TDSELCTRL] = { 0xe60603c0, }, + { /* sentinel */ }, +}; + + static int r8a77995_pin_to_pocctrl(unsigned int pin, u32 *pocctrl) { int bit = -EINVAL; - *pocctrl = 0xe6060380; + *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg; if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 9)) bit = 29 - (pin - RCAR_GP_PIN(3, 0)); @@ -3075,15 +3087,6 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { { /* sentinel */ } }; -enum ioctrl_regs { - TDSELCTRL, -}; - -static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { - [TDSELCTRL] = { 0xe60603c0, }, - { /* sentinel */ }, -}; - static const struct pinmux_bias_reg * r8a77995_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, unsigned int *puen_bit, unsigned int *pud_bit) |