diff options
Diffstat (limited to 'arch/arm/boot/dts/stm32mp15-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 666 |
1 files changed, 637 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 73c07f0dfad2..7eb858732d6d 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -6,7 +6,7 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { - adc1_in6_pins_a: adc1-in6 { + adc1_in6_pins_a: adc1-in6-0 { pins { pinmux = <STM32_PINMUX('F', 12, ANALOG)>; }; @@ -21,6 +21,13 @@ }; }; + adc12_ain_pins_b: adc12-ain-1 { + pins { + pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ + <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */ + }; + }; + adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 { pins { pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */ @@ -37,7 +44,7 @@ }; }; - cec_pins_sleep_a: cec-sleep-0 { + cec_sleep_pins_a: cec-sleep-0 { pins { pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */ }; @@ -52,19 +59,19 @@ }; }; - cec_pins_sleep_b: cec-sleep-1 { + cec_sleep_pins_b: cec-sleep-1 { pins { pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */ }; }; - dac_ch1_pins_a: dac-ch1 { + dac_ch1_pins_a: dac-ch1-0 { pins { pinmux = <STM32_PINMUX('A', 4, ANALOG)>; }; }; - dac_ch2_pins_a: dac-ch2 { + dac_ch2_pins_a: dac-ch2-0 { pins { pinmux = <STM32_PINMUX('A', 5, ANALOG)>; }; @@ -142,7 +149,7 @@ }; }; - ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 { + ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 { pins1 { pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ @@ -162,6 +169,108 @@ }; }; + ethernet0_rgmii_pins_b: rgmii-1 { + pins1 { + pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ + <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + }; + + ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 { + pins1 { + pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ + <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ + <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ + }; + }; + + ethernet0_rgmii_pins_c: rgmii-2 { + pins1 { + pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ + <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + }; + + ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { + pins1 { + pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ + <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ + <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ + }; + }; + ethernet0_rmii_pins_a: rmii-0 { pins1 { pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ @@ -182,7 +291,7 @@ }; }; - ethernet0_rmii_pins_sleep_a: rmii-sleep-0 { + ethernet0_rmii_sleep_pins_a: rmii-sleep-0 { pins1 { pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */ <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */ @@ -250,14 +359,14 @@ }; }; - i2c1_pins_sleep_a: i2c1-1 { + i2c1_sleep_pins_a: i2c1-sleep-0 { pins { pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ }; }; - i2c1_pins_b: i2c1-2 { + i2c1_pins_b: i2c1-1 { pins { pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */ <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ @@ -267,7 +376,7 @@ }; }; - i2c1_pins_sleep_b: i2c1-3 { + i2c1_sleep_pins_b: i2c1-sleep-1 { pins { pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */ <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ @@ -284,14 +393,14 @@ }; }; - i2c2_pins_sleep_a: i2c2-1 { + i2c2_sleep_pins_a: i2c2-sleep-0 { pins { pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */ <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ }; }; - i2c2_pins_b1: i2c2-2 { + i2c2_pins_b1: i2c2-1 { pins { pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ bias-disable; @@ -300,12 +409,29 @@ }; }; - i2c2_pins_sleep_b1: i2c2-3 { + i2c2_sleep_pins_b1: i2c2-sleep-1 { pins { pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ }; }; + i2c2_pins_c: i2c2-2 { + pins { + pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */ + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_pins_sleep_c: i2c2-sleep-2 { + pins { + pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */ + <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ + }; + }; + i2c5_pins_a: i2c5-0 { pins { pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */ @@ -316,7 +442,7 @@ }; }; - i2c5_pins_sleep_a: i2c5-1 { + i2c5_sleep_pins_a: i2c5-sleep-0 { pins { pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */ <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */ @@ -324,6 +450,23 @@ }; }; + i2c5_pins_b: i2c5-1 { + pins { + pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */ + <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c5_sleep_pins_b: i2c5-sleep-1 { + pins { + pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */ + <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ + }; + }; + i2s2_pins_a: i2s2-0 { pins { pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */ @@ -335,7 +478,7 @@ }; }; - i2s2_pins_sleep_a: i2s2-1 { + i2s2_sleep_pins_a: i2s2-sleep-0 { pins { pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */ <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */ @@ -343,7 +486,7 @@ }; }; - ltdc_pins_a: ltdc-a-0 { + ltdc_pins_a: ltdc-0 { pins { pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */ <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ @@ -379,7 +522,7 @@ }; }; - ltdc_pins_sleep_a: ltdc-a-1 { + ltdc_sleep_pins_a: ltdc-sleep-0 { pins { pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ @@ -412,7 +555,7 @@ }; }; - ltdc_pins_b: ltdc-b-0 { + ltdc_pins_b: ltdc-1 { pins { pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */ <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */ @@ -448,7 +591,7 @@ }; }; - ltdc_pins_sleep_b: ltdc-b-1 { + ltdc_sleep_pins_b: ltdc-sleep-1 { pins { pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */ <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */ @@ -481,6 +624,142 @@ }; }; + ltdc_pins_c: ltdc-2 { + pins1 { + pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */ + <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */ + <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ + <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */ + <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */ + <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ + <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */ + <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ + <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */ + <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ + <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */ + <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ + <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ + <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ + <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ + <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */ + <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ + <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */ + <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */ + <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ + <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + ltdc_sleep_pins_c: ltdc-sleep-2 { + pins1 { + pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */ + <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */ + <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ + <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */ + <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ + <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ + <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */ + <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ + <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */ + <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ + <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ + <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ + <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ + <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */ + <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ + <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */ + <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */ + <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ + <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ + <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */ + }; + }; + + ltdc_pins_d: ltdc-3 { + pins1 { + pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + pins2 { + pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ + <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */ + <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */ + <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */ + <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */ + <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */ + <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */ + <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */ + <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */ + <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */ + <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */ + <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */ + <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ + <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */ + <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */ + <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */ + <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */ + <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */ + <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */ + <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */ + <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */ + <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */ + <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */ + <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */ + <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */ + <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + ltdc_sleep_pins_d: ltdc-sleep-3 { + pins { + pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ + <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ + <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */ + <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */ + <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */ + <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */ + <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */ + <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */ + <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */ + <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */ + <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */ + <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */ + <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */ + <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */ + <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ + <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */ + <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */ + <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */ + <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */ + <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */ + <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */ + <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */ + <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */ + <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */ + <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */ + <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */ + }; + }; + m_can1_pins_a: m-can1-0 { pins1 { pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ @@ -501,6 +780,46 @@ }; }; + m_can1_pins_b: m-can1-1 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_b: m_can1-sleep-1 { + pins { + pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */ + <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */ + }; + }; + + m_can2_pins_a: m-can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-disable; + }; + }; + + m_can2_sleep_pins_a: m_can2-sleep-0 { + pins { + pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */ + <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */ + }; + }; + pwm1_pins_a: pwm1-0 { pins { pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */ @@ -550,6 +869,21 @@ }; }; + pwm3_pins_b: pwm3-1 { + pins { + pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm3_sleep_pins_b: pwm3-sleep-1 { + pins { + pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */ + }; + }; + pwm4_pins_a: pwm4-0 { pins { pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */ @@ -597,6 +931,25 @@ }; }; + pwm5_pins_b: pwm5-1 { + pins { + pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */ + <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */ + <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm5_sleep_pins_b: pwm5-sleep-1 { + pins { + pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */ + <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */ + <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */ + }; + }; + pwm8_pins_a: pwm8-0 { pins { pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */ @@ -710,7 +1063,7 @@ }; }; - sai2a_sleep_pins_a: sai2a-1 { + sai2a_sleep_pins_a: sai2a-sleep-0 { pins { pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */ <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ @@ -720,7 +1073,7 @@ }; - sai2a_pins_b: sai2a-2 { + sai2a_pins_b: sai2a-1 { pins1 { pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ @@ -731,7 +1084,7 @@ }; }; - sai2a_sleep_pins_b: sai2a-sleep-3 { + sai2a_sleep_pins_b: sai2a-sleep-1 { pins { pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ @@ -739,6 +1092,25 @@ }; }; + sai2a_pins_c: sai2a-4 { + pins { + pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */ + <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */ + <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + }; + + sai2a_sleep_pins_c: sai2a-5 { + pins { + pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */ + <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */ + <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */ + }; + }; + sai2b_pins_a: sai2b-0 { pins1 { pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */ @@ -754,7 +1126,7 @@ }; }; - sai2b_sleep_pins_a: sai2b-1 { + sai2b_sleep_pins_a: sai2b-sleep-0 { pins { pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */ <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */ @@ -763,14 +1135,27 @@ }; }; - sai2b_pins_b: sai2b-2 { + sai2b_pins_b: sai2b-1 { pins { pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ bias-disable; }; }; - sai2b_sleep_pins_b: sai2b-3 { + sai2b_sleep_pins_b: sai2b-sleep-1 { + pins { + pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ + }; + }; + + sai2b_pins_c: sai2a-4 { + pins1 { + pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ + bias-disable; + }; + }; + + sai2b_sleep_pins_c: sai2a-sleep-5 { pins { pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ }; @@ -785,7 +1170,7 @@ }; }; - sai4a_sleep_pins_a: sai4a-1 { + sai4a_sleep_pins_a: sai4a-sleep-0 { pins { pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */ }; @@ -869,6 +1254,30 @@ }; }; + sdmmc1_dir_pins_b: sdmmc1-dir-1 { + pins1 { + pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2{ + pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ + bias-pull-up; + }; + }; + + sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 { + pins { + pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ + <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */ + }; + }; + sdmmc2_b4_pins_a: sdmmc2-b4-0 { pins1 { pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ @@ -987,6 +1396,48 @@ }; }; + sdmmc2_d47_pins_b: sdmmc2-d47-1 { + pins { + pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ + <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ + <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ + <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 { + pins { + pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ + <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ + <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ + <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ + }; + }; + + sdmmc2_d47_pins_c: sdmmc2-d47-2 { + pins { + pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ + <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */ + <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ + <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 { + pins { + pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ + <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */ + <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ + <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ + }; + }; + sdmmc3_b4_pins_a: sdmmc3-b4-0 { pins1 { pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ @@ -1041,6 +1492,60 @@ }; }; + sdmmc3_b4_pins_b: sdmmc3-b4-1 { + pins1 { + pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ + <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ + <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ + <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ + <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { + pins1 { + pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ + <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ + <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ + <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + pins3 { + pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 { + pins { + pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */ + <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */ + <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ + <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ + <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ + <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ + }; + }; + spdifrx_pins_a: spdifrx-0 { pins { pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */ @@ -1048,12 +1553,75 @@ }; }; - spdifrx_sleep_pins_a: spdifrx-1 { + spdifrx_sleep_pins_a: spdifrx-sleep-0 { pins { pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */ }; }; + spi2_pins_a: spi2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */ + <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */ + bias-disable; + }; + }; + + usart2_pins_a: usart2-0 { + pins1 { + pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ + <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ + <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_sleep_pins_a: usart2-sleep-0 { + pins { + pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ + <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ + <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ + <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ + }; + }; + + usart2_pins_b: usart2-1 { + pins1 { + pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ + <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */ + <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_sleep_pins_b: usart2-sleep-1 { + pins { + pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ + <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */ + <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */ + <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */ + }; + }; + usart3_pins_a: usart3-0 { pins1 { pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ @@ -1093,6 +1661,19 @@ }; }; + uart4_pins_c: uart4-2 { + pins1 { + pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ + bias-disable; + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */ @@ -1108,6 +1689,19 @@ }; }; + uart7_pins_b: uart7-1 { + pins1 { + pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */ + bias-disable; + }; + }; + uart8_pins_a: uart8-0 { pins1 { pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ @@ -1145,7 +1739,7 @@ }; }; - i2c2_pins_sleep_b2: i2c2-1 { + i2c2_sleep_pins_b2: i2c2-sleep-0 { pins { pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */ }; @@ -1161,7 +1755,7 @@ }; }; - i2c4_pins_sleep_a: i2c4-1 { + i2c4_sleep_pins_a: i2c4-sleep-0 { pins { pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */ <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */ @@ -1182,4 +1776,18 @@ bias-disable; }; }; + + spi4_pins_a: spi4-0 { + pins { + pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ + <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ + bias-disable; + }; + }; }; |