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path: root/drivers/gpu/drm/i915/gt/intel_rc6.c
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Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_rc6.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_rc6.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 63db136cbc27..cc8bff220abc 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -271,7 +271,7 @@ static void gen6_rc6_enable(struct intel_rc6 *rc6)
GEN6_RC_CTL_HW_ENABLE;
rc6vids = 0;
- ret = snb_pcode_read(i915, GEN6_PCODE_READ_RC6VIDS, &rc6vids, NULL);
+ ret = snb_pcode_read(rc6_to_gt(rc6)->uncore, GEN6_PCODE_READ_RC6VIDS, &rc6vids, NULL);
if (GRAPHICS_VER(i915) == 6 && ret) {
drm_dbg(&i915->drm, "Couldn't check for BIOS workaround\n");
} else if (GRAPHICS_VER(i915) == 6 &&
@@ -281,7 +281,7 @@ static void gen6_rc6_enable(struct intel_rc6 *rc6)
GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450);
rc6vids &= 0xffff00;
rc6vids |= GEN6_ENCODE_RC6_VID(450);
- ret = snb_pcode_write(i915, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
+ ret = snb_pcode_write(rc6_to_gt(rc6)->uncore, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
if (ret)
drm_err(&i915->drm,
"Couldn't fix incorrect rc6 voltage\n");