| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | clk: qcom: Export clk_alpha_pll_configure() | Bjorn Andersson | 2018-10-16 | 1 | -0/+1 |
| * | clk: qcom: Update SPDX headers for common files | Taniya Das | 2018-07-25 | 1 | -9/+1 |
| * | clk: qcom: Export clk_fabia_pll_configure() | Stephen Boyd | 2018-06-02 | 1 | -0/+1 |
| * | clk: qcom: Add support for controlling Fabia PLL | Amit Nischal | 2018-03-19 | 1 | -7/+294 |
| * | clk: qcom: add read-only alpha pll post divider operations | Abhishek Sahu | 2017-12-13 | 1 | -0/+25 |
| * | clk: qcom: support for 2 bit PLL post divider | Abhishek Sahu | 2017-12-13 | 1 | -4/+17 |
| * | clk: qcom: support Brammo type Alpha PLL | Abhishek Sahu | 2017-12-13 | 1 | -0/+9 |
| * | clk: qcom: support Huayra type Alpha PLL | Abhishek Sahu | 2017-12-13 | 1 | -5/+187 |
| * | clk: qcom: support for dynamic updating the PLL | Abhishek Sahu | 2017-12-13 | 1 | -4/+79 |
| * | clk: qcom: support for alpha mode configuration | Abhishek Sahu | 2017-12-13 | 1 | -0/+5 |
| * | clk: qcom: flag for 64 bit CONFIG_CTL | Abhishek Sahu | 2017-12-13 | 1 | -1/+6 |
| * | clk: qcom: fix 16 bit alpha support calculation | Abhishek Sahu | 2017-12-13 | 1 | -24/+34 |
| * | clk: qcom: support for alpha pll properties | Abhishek Sahu | 2017-12-13 | 1 | -62/+68 |
| * | clk: qcom: Add .is_enabled ops for clk-alpha-pll | Rajendra Nayak | 2016-11-02 | 1 | -0/+26 |
| * | clk: qcom: Enable FSM mode for votable alpha PLLs | Rajendra Nayak | 2016-11-01 | 1 | -0/+4 |
| * | clk: qcom: handle alpha PLLs with 16bit alpha val registers | Rajendra Nayak | 2016-11-01 | 1 | -7/+17 |
| * | clk: qcom: Add support to initialize alpha plls | Rajendra Nayak | 2016-11-01 | 1 | -0/+31 |
| * | clk: qcom: Add support for alpha pll hwfsm ops | Rajendra Nayak | 2016-11-01 | 1 | -12/+90 |
| * | clk: qcom: Add Alpha PLL support | Stephen Boyd | 2015-11-30 | 1 | -0/+355 |
