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path: root/drivers/gpu/drm/i915/i915_reg.h
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* drm/i915: Idle unused rings on gen2/3 during init/resumeVille Syrjälä2014-09-031-0/+7
* drm/i915: Disable trickle feed for gen2/3Ville Syrjälä2014-09-031-0/+4
* drm/i915/bdw: BDW Software TurboDaisy Sun2014-09-031-0/+4
* drm/i915: Populate mem_freq in init_gt_powerwave()Ville Syrjälä2014-09-031-6/+0
* drm/i915: Rename defines for selection of ddi buffer translation slotSonika Jindal2014-09-031-9/+1
* drm/i915: Parametrize PANEL_PORT_SELECT_VLVVille Syrjälä2014-09-031-2/+1
* drm/i915: Add 180 degree primary plane rotation supportSonika Jindal2014-09-031-0/+1
* drm/i915: Add support for variable cursor size on 845/865Ville Syrjälä2014-08-131-1/+2
* drm/i915/bdw: Interrupts with logical ringsOscar Mateo2014-08-111-0/+2
* drm/i915/bdw: GEN-specific logical ring emit requestOscar Mateo2014-08-111-0/+1
* drm/i915/bdw: Populate LR contexts (somewhat)Oscar Mateo2014-08-111-0/+1
* drm/i915: Add sprite watermark programming for VLV and CHVGajanan Bhat2014-08-081-6/+3
* drm/i915: Generalize drain latency computationGajanan Bhat2014-08-081-0/+1
* drm/i915: Polish the chv cmnlane resrt macrosVille Syrjälä2014-08-081-5/+2
* drm/i915: Parametrize VLV_DDL registersVille Syrjälä2014-08-081-41/+13
* drm/i915: Fill out the FWx watermark register definesVille Syrjälä2014-08-081-15/+123
* drm/i915: Add 180 degree sprite rotation supportVille Syrjälä2014-08-081-0/+3
* drm/i915: remove duplicate register definesPaulo Zanoni2014-08-081-2/+0
* drm/i915: Introduce FBC False Color for debug purposes.Rodrigo Vivi2014-08-081-0/+1
* drm/i915: Clarify CHV swing margin/deemph bitsVille Syrjälä2014-08-081-2/+6
* drm/i915: Add cdclk change support for chvVille Syrjälä2014-08-081-0/+4
* drm/i915: Add DP training pattern 3 for CHVVille Syrjälä2014-08-081-0/+2
* drm/i915: Add chv port D TX wellsVille Syrjälä2014-08-081-0/+4
* drm/i915: Add per-pipe power wells for chvVille Syrjälä2014-08-081-0/+12
* drm/i915: Add chv cmnlane power wellsVille Syrjälä2014-08-081-0/+1
* drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang2014-08-071-25/+25
* Merge tag 'v3.16' into drm-nextDave Airlie2014-08-051-0/+3
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| * drm/i915: Don't clobber the GTT when it's within stolen memoryVille Syrjälä2014-07-091-0/+3
* | Merge remote-tracking branch 'airlied/drm-next' into drm-intel-nextDaniel Vetter2014-07-291-2/+9
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| * | drm/i915: add some registers need for displayport MST support.Dave Airlie2014-07-211-2/+9
* | | drm/i915/chv: calculate rc6 residency correctlyMika Kuoppala2014-07-121-1/+1
* | | drm/i915: populate mem_freq/cz_clock for chvDeepak S2014-07-111-0/+6
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* | drm/i915: Switch to common shared dpll framework for WRPLLsDaniel Vetter2014-07-101-0/+1
* | drm/i915: State readout support for WRPLLsDaniel Vetter2014-07-101-0/+1
* | drm/i915: State readout and cross-checking for ddi_pll_selDaniel Vetter2014-07-101-0/+1
* | drm/i915: Clean up WRPLL/SPLL #definesDaniel Vetter2014-07-101-3/+4
* | drm/i915: fix D_COMP usage on BDWPaulo Zanoni2014-07-101-1/+4
* | drm/i915/vlv: WA for Turbo and RC6 to work together.Deepak S2014-07-081-0/+11
* | drm/i915/bdw: implement semaphore waitBen Widawsky2014-07-071-0/+3
* | drm/i915/bdw: implement semaphore signalBen Widawsky2014-07-071-1/+4
* | drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bitsVille Syrjälä2014-07-071-0/+5
* | drm/i915: Add some L3 registers to the parser whitelistBrad Volkin2014-06-181-0/+2
* | drm/i915: update BDW DDI buffer translationsPaulo Zanoni2014-06-161-11/+0
* | drm/i915: BDW PSR: Add single frame update support.Rodrigo Vivi2014-06-131-0/+1
* | drm/i915: Fix VLV CRC reading.Rodrigo Vivi2014-06-131-1/+1
* | drm/i915: Add #defines for short/long pulse on gmch platformsDaniel Vetter2014-06-111-0/+6
* | drm/i915: Use transcoder as index to MIPI regsShashank Sharma2014-06-111-47/+93
* | drm/i915: Change Mipi register definitionsShashank Sharma2014-06-111-90/+93
* | drm/i915/chv: Handle video DIP registers on CHVVille Syrjälä2014-06-111-5/+12
* | drm/i915: Don't use pipe_offset stuff for DPLL registersVille Syrjälä2014-06-111-16/+10
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