diff options
| author | Primoz Fiser <primoz.fiser@norik.com> | 2021-04-12 08:24:50 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-28 09:14:24 +0200 |
| commit | 5aca74e157482165b3ae8206a56dadb6b6d98e83 (patch) | |
| tree | cb6d7133c5ac2b1ee90039352c4dfe3800cd9be9 | |
| parent | dad0441f35c7a3ee2b4a4b9b8da2fabaad6587e5 (diff) | |
| download | linux-rt-5aca74e157482165b3ae8206a56dadb6b6d98e83.tar.gz | |
ARM: dts: imx6: phyFLEX: Fix UART hardware flow control
[ Upstream commit 14cdc1f243d79e0b46be150502b7dba9c5a6bdfd ]
Serial interface uart3 on phyFLEX board is capable of 5-wire connection
including signals RTS and CTS for hardware flow control.
Fix signals UART3_CTS_B and UART3_RTS_B padmux assignments and add
missing property "uart-has-rtscts" to allow serial interface to be
configured and used with the hardware flow control.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index fed72a5f3ffa..4dede1fbfadb 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -307,8 +307,8 @@ fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 >; }; @@ -395,6 +395,7 @@ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; status = "disabled"; }; |