diff options
| author | Russ Anderson <rja@sgi.com> | 2007-10-31 11:10:38 -0500 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2007-11-06 15:40:31 -0800 |
| commit | 1f3b6045f783ee394076ad6dba2d72ecaaecd243 (patch) | |
| tree | c20820794846f45db619991d0ddc26832ccf75e8 /arch/ia64/sn/kernel/irq.c | |
| parent | adb34022eb7a11126fecef6b5abb4741a17360c6 (diff) | |
| download | linux-rt-1f3b6045f783ee394076ad6dba2d72ecaaecd243.tar.gz | |
[IA64] Disable/re-enable CPE interrupts on Altix
When the CPE handler encounters too many CPEs (such as a solid single
bit memory error), it sets up a polling timer and disables the CPE
interrupt (to avoid excessive overhead logging the stream of single
bit errors). disable_irq_nosync() calls chip->disable() to provide
a chipset specifiec interface for disabling the interrupt. This patch
adds the Altix specific support to disable and re-enable the CPE interrupt.
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/sn/kernel/irq.c')
| -rw-r--r-- | arch/ia64/sn/kernel/irq.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 0f9b12683bf3..53351c3cd7b1 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -5,7 +5,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include <linux/irq.h> @@ -85,12 +85,18 @@ static void sn_shutdown_irq(unsigned int irq) { } +extern void ia64_mca_register_cpev(int); + static void sn_disable_irq(unsigned int irq) { + if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) + ia64_mca_register_cpev(0); } static void sn_enable_irq(unsigned int irq) { + if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) + ia64_mca_register_cpev(irq); } static void sn_ack_irq(unsigned int irq) |