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author | Christian König <christian.koenig@amd.com> | 2016-05-03 15:54:54 +0200 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2016-05-11 12:31:20 -0400 |
commit | edf600dac65eecb6c8bcf21fa986db30ee21a2ac (patch) | |
tree | ed9c19dc1e661351c438eaf8d3ff1ae4ce93f72f /drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h | |
parent | b1c8a81fdd346274e3c38909740eec7182ef8f8a (diff) | |
download | linux-rt-edf600dac65eecb6c8bcf21fa986db30ee21a2ac.tar.gz |
drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;
v2: drop changes to DAL and internal headers
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h index c6a6b4006dc1..573cd39fe78d 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h @@ -74,7 +74,7 @@ struct tonga_power_state { }; struct _phw_tonga_dpm_level { - bool enabled; + bool enabled; uint32_t value; uint32_t param1; }; @@ -237,20 +237,20 @@ struct tonga_hwmgr { irq_handler_func_t ctf_callback; void *ctf_context; - phw_tonga_clock_registers clock_registers; + phw_tonga_clock_registers clock_registers; phw_tonga_voltage_smio_registers voltage_smio_registers; - bool is_memory_GDDR5; + bool is_memory_GDDR5; uint16_t acpi_vddc; - bool pspp_notify_required; /* Flag to indicate if PSPP notification to SBIOS is required */ + bool pspp_notify_required; /* Flag to indicate if PSPP notification to SBIOS is required */ uint16_t force_pcie_gen; /* The forced PCI-E speed if not 0xffff */ uint16_t acpi_pcie_gen; /* The PCI-E speed at ACPI time */ uint32_t pcie_gen_cap; /* The PCI-E speed capabilities bitmap from CAIL */ uint32_t pcie_lane_cap; /* The PCI-E lane capabilities bitmap from CAIL */ uint32_t pcie_spc_cap; /* Symbol Per Clock Capabilities from registry */ - phw_tonga_leakage_voltage vddc_leakage; /* The Leakage VDDC supported (based on leakage ID).*/ - phw_tonga_leakage_voltage vddcgfx_leakage; /* The Leakage VDDC supported (based on leakage ID). */ - phw_tonga_leakage_voltage vddci_leakage; /* The Leakage VDDCI supported (based on leakage ID). */ + phw_tonga_leakage_voltage vddc_leakage; /* The Leakage VDDC supported (based on leakage ID).*/ + phw_tonga_leakage_voltage vddcgfx_leakage; /* The Leakage VDDC supported (based on leakage ID). */ + phw_tonga_leakage_voltage vddci_leakage; /* The Leakage VDDCI supported (based on leakage ID). */ uint32_t mvdd_control; uint32_t vddc_mask_low; @@ -263,8 +263,8 @@ struct tonga_hwmgr { uint32_t mclk_stutter_mode_threshold; uint32_t mclk_edc_enable_threshold; uint32_t mclk_edc_wr_enable_threshold; - bool is_uvd_enabled; - bool is_xdma_enabled; + bool is_uvd_enabled; + bool is_xdma_enabled; phw_tonga_vbios_boot_state vbios_boot_state; bool battery_state; |