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| author | Julia Cartwright <julia@ni.com> | 2018-02-26 11:22:02 -0600 |
|---|---|---|
| committer | Julia Cartwright <julia@ni.com> | 2018-02-26 11:22:02 -0600 |
| commit | 184d107421c695782ae8cc976170e3cf83fbca9a (patch) | |
| tree | 20d804c113e6fbc3a298b069b5a777fb81e194f4 /drivers/hwmon/coretemp.c | |
| parent | 90816cc1d4a1d23efe37b74866c6174dd5eab6b5 (diff) | |
| parent | 19c04ca5b239e6e2277a5b381d1e79482ab9bbc5 (diff) | |
| download | linux-rt-184d107421c695782ae8cc976170e3cf83fbca9a.tar.gz | |
Merge tag 'v4.9.84' into v4.9-rt
This is the 4.9.84 stable release
Diffstat (limited to 'drivers/hwmon/coretemp.c')
| -rw-r--r-- | drivers/hwmon/coretemp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index 6a27eb2fed17..be1e380fa1c3 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -269,13 +269,13 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { const struct tjmax_model *tm = &tjmax_model_table[i]; if (c->x86_model == tm->model && - (tm->mask == ANY || c->x86_mask == tm->mask)) + (tm->mask == ANY || c->x86_stepping == tm->mask)) return tm->tjmax; } /* Early chips have no MSR for TjMax */ - if (c->x86_model == 0xf && c->x86_mask < 4) + if (c->x86_model == 0xf && c->x86_stepping < 4) usemsr_ee = 0; if (c->x86_model > 0xe && usemsr_ee) { @@ -426,7 +426,7 @@ static int chk_ucode_version(unsigned int cpu) * Readings might stop update when processor visited too deep sleep, * fixed for stepping D0 (6EC). */ - if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { + if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) { pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); return -ENODEV; } |