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| author | Andi Kleen <ak@linux.intel.com> | 2018-08-07 15:09:38 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-08-15 18:13:01 +0200 |
| commit | 06f412c63545b1dec8451f6eda007a2d40c08e58 (patch) | |
| tree | f2ad8ea0fffd808f2e5a6031031207adc2472ec0 /tools/arch/m32r | |
| parent | ce1eed46b7b7b8e2c8dc515dbb07968241a0208e (diff) | |
| download | linux-rt-06f412c63545b1dec8451f6eda007a2d40c08e58.tar.gz | |
x86/mm/kmmio: Make the tracer robust against L1TF
commit 1063711b57393c1999248cccb57bebfaf16739e7 upstream
The mmio tracer sets io mapping PTEs and PMDs to non present when enabled
without inverting the address bits, which makes the PTE entry vulnerable
for L1TF.
Make it use the right low level macros to actually invert the address bits
to protect against L1TF.
In principle this could be avoided because MMIO tracing is not likely to be
enabled on production machines, but the fix is straigt forward and for
consistency sake it's better to get rid of the open coded PTE manipulation.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/arch/m32r')
0 files changed, 0 insertions, 0 deletions