summaryrefslogtreecommitdiff
path: root/arch/mips/kernel/cps-vec.S
Commit message (Expand)AuthorAgeFilesLines
* MIPS: CPS: Copy EVA configuration when starting secondary VPs.Matt Redfearn2016-05-281-0/+15
* MIPS: smp-cps: Stop printing EJTAG exceptions to UARTPaul Burton2016-05-131-1/+0
* MIPS: smp-cps: Support MIPSr6 Virtual ProcessorsPaul Burton2016-05-131-2/+51
* MIPS: smp-cps: Skip core setup if coherentPaul Burton2016-05-131-15/+24
* MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpesPaul Burton2016-05-131-28/+46
* MIPS: smp-cps: Pull cache init into a functionPaul Burton2016-05-131-67/+76
* MIPS: CPS: drop .set mips64r2 directivesPaul Burton2015-12-221-2/+0
* MIPS: CPS: Skip Config1 presence checkPaul Burton2015-11-111-3/+1
* MIPS: CPS: Read CM GCR base from cop0Paul Burton2015-11-111-4/+8
* MIPS: CPS: Early debug using an ns16550-compatible UARTPaul Burton2015-11-111-0/+20
* MIPS: CPS: Set Status.KX on entry for MIPS64 kernelsPaul Burton2015-10-261-1/+7
* MIPS: CPS: Set Status.BEV bit during early bootPaul Burton2015-10-261-1/+1
* MIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than CONFIG_MIPS_MTPaul Burton2015-09-301-4/+4
* MIPS: CPS: Don't include MT code in non-MT kernels.Paul Burton2015-09-301-0/+2
* MIPS: CPS: Stop dangling delay slot from has_mt.Paul Burton2015-09-301-2/+2
* MIPS: CPS: use 32b accesses to GCRsPaul Burton2015-08-281-2/+2
* MIPS: cps-vec: Use macros for various arithmetics and memory operationsMarkos Chandras2015-07-091-16/+16
* MIPS: kernel: cps-vec: Replace KSEG0 with CKSEG0Markos Chandras2015-07-091-2/+2
* MIPS: kernel: cps-vec: Use ta0-ta3 pseudo-registers for 64-bitMarkos Chandras2015-07-091-21/+21
* MIPS: kernel: cps-vec: Replace mips32r2 ISA level with mips64r2Markos Chandras2015-07-091-2/+2
* MIPS: kernel: cps-vec: Replace 'la' macro with PTR_LAMarkos Chandras2015-07-091-10/+10
* MIPS: kernel: cps-vec: Replace "addi" with "addiu"Markos Chandras2015-02-171-8/+8
* MIPS: kernel: cps-vec: Set ISA level to mips32r2 for the MIPS MT ASEMarkos Chandras2014-11-241-0/+2
* MIPS: CPS: Initialize EVA before bringing up VPEs from secondary coresMarkos Chandras2014-08-191-0/+4
* MIPS: smp-cps: duplicate core0 CCA on secondary coresPaul Burton2014-05-281-4/+7
* MIPS: pm-cps: add PM state entry code for CPS systemsPaul Burton2014-05-281-0/+35
* MIPS: smp-cps: rework core/VPE initialisationPaul Burton2014-05-281-12/+270
* MIPS: Coherent Processing System SMP implementationPaul Burton2014-03-261-0/+191
View Lorry Controller Status