| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | x86/bugs: Add "unknown" reporting for MMIO Stale Data | Pawan Gupta | 2022-09-05 | 1 | -0/+1 |
| * | x86/cpu: Add Tiger Lake to Intel family | Gayatri Kammela | 2022-09-05 | 1 | -0/+3 |
| * | kexec_file: drop weak attribute from arch_kexec_apply_relocations[_add] | Naveen N. Rao | 2022-07-02 | 1 | -0/+6 |
| * | x86/tsc: Use fallback for random_get_entropy() instead of zero | Jason A. Donenfeld | 2022-06-25 | 2 | -4/+12 |
| * | x86: Remove arch_has_random, arch_has_random_seed | Richard Henderson | 2022-06-25 | 1 | -8/+4 |
| * | KVM: x86/speculation: Disable Fill buffer clear within guests | Pawan Gupta | 2022-06-16 | 1 | -0/+6 |
| * | x86/speculation/mmio: Add mitigation for Processor MMIO Stale Data | Pawan Gupta | 2022-06-16 | 1 | -0/+2 |
| * | x86/speculation/mmio: Enumerate Processor MMIO Stale Data bug | Pawan Gupta | 2022-06-16 | 2 | -0/+20 |
| * | x86/cpu: Add another Alder Lake CPU to the Intel family | Gayatri Kammela | 2022-06-16 | 1 | -0/+1 |
| * | x86/cpu: Add Lakefield, Alder Lake and Rocket Lake models to the to Intel CPU... | Tony Luck | 2022-06-16 | 1 | -0/+7 |
| * | x86/cpu: Add Comet Lake to the Intel CPU models header | Kan Liang | 2022-06-16 | 1 | -0/+3 |
| * | x86/CPU: Add more Icelake model numbers | Kan Liang | 2022-06-16 | 1 | -0/+3 |
| * | x86/CPU: Add Icelake model number | Rajneesh Bhardwaj | 2022-06-16 | 1 | -0/+2 |
| * | x86/cpu: Add Cannonlake to Intel family | Rajneesh Bhardwaj | 2022-06-16 | 1 | -0/+6 |
| * | x86/cpu: Add Jasper Lake to Intel family | Zhang Rui | 2022-06-16 | 1 | -0/+1 |
| * | x86/cpu: Add Elkhart Lake to Intel family | Gayatri Kammela | 2022-06-16 | 1 | -0/+2 |
| * | x86/pm: Fix false positive kmemleak report in msr_build_context() | Matthieu Baerts | 2022-06-14 | 2 | -5/+9 |
| * | ACPICA: Avoid cache flush inside virtual machines | Kirill A. Shutemov | 2022-06-14 | 1 | -1/+13 |
| * | x86/cpu: Load microcode during restore_processor_state() | Borislav Petkov | 2022-05-12 | 1 | -0/+2 |
| * | stat: fix inconsistency between struct stat and struct compat_stat | Mikulas Patocka | 2022-04-27 | 1 | -4/+2 |
| * | x86/speculation: Add eIBRS + Retpoline options | Peter Zijlstra | 2022-03-11 | 1 | -1/+3 |
| * | x86/speculation: Rename RETPOLINE_AMD to RETPOLINE_LFENCE | Peter Zijlstra (Intel) | 2022-03-11 | 2 | -7/+7 |
| * | x86/pkey: Fix undefined behaviour with PKRU_WD_BIT | Andrew Cooper | 2021-12-29 | 1 | -2/+2 |
| * | x86: Increase exception stack sizes | Peter Zijlstra | 2021-11-26 | 1 | -1/+1 |
| * | mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS | Kirill A. Shutemov | 2021-11-12 | 2 | -0/+3 |
| * | x86/fpu: Make init_fpstate correct with optimized XSAVE | Thomas Gleixner | 2021-08-26 | 1 | -22/+8 |
| * | KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653) | Maxim Levitsky | 2021-08-26 | 1 | -0/+2 |
| * | x86/asm: Ensure asm/proto.h can be included stand-alone | Jan Kiszka | 2021-08-04 | 1 | -0/+2 |
| * | x86/fpu: Return proper error codes from user access functions | Thomas Gleixner | 2021-07-20 | 1 | -7/+12 |
| * | x86: Introduce TS_COMPAT_RESTART to fix get_nr_restart_syscall() | Oleg Nesterov | 2021-03-24 | 1 | -1/+13 |
| * | x86: Move TS_COMPAT back to asm/thread_info.h | Oleg Nesterov | 2021-03-24 | 2 | -9/+9 |
| * | x86/apic: Add extra serialization for non-serializing MSRs | Dave Hansen | 2021-02-10 | 2 | -10/+18 |
| * | x86: __always_inline __{rd,wr}msr() | Peter Zijlstra | 2021-02-07 | 1 | -2/+2 |
| * | x86/mm/mem_encrypt: Fix definition of PMD_FLAGS_DEC_WP | Arvind Sankar | 2020-12-29 | 1 | -0/+1 |
| * | x86/uprobes: Do not use prefixes.nbytes when looping over prefixes.bytes | Masami Hiramatsu | 2020-12-11 | 1 | -0/+15 |
| * | perf/x86/amd/ibs: Fix raw sample data accumulation | Kim Phillips | 2020-11-05 | 1 | -0/+1 |
| * | x86/speculation/mds: Mark mds_user_clear_cpu_buffers() __always_inline | Thomas Gleixner | 2020-10-01 | 1 | -2/+2 |
| * | x86/pkeys: Add check for pkey "overflow" | Dave Hansen | 2020-10-01 | 1 | -0/+5 |
| * | x86/entry: Increase entry_stack size to a full page | Peter Zijlstra | 2020-07-22 | 1 | -1/+1 |
| * | KVM: nVMX: Plumb L2 GPA through to PML emulation | Sean Christopherson | 2020-06-30 | 1 | -1/+1 |
| * | x86/speculation: Add support for STIBP always-on preferred mode | Thomas Lendacky | 2020-06-20 | 2 | -0/+2 |
| * | x86: uaccess: Inhibit speculation past access_ok() in user_access_begin() | Will Deacon | 2020-06-20 | 1 | -1/+1 |
| * | make 'user_access_begin()' do 'access_ok()' | Linus Torvalds | 2020-06-20 | 1 | -1/+11 |
| * | x86/speculation: Add Special Register Buffer Data Sampling (SRBDS) mitigation | Mark Gross | 2020-06-11 | 2 | -0/+6 |
| * | x86/cpu: Add a steppings field to struct x86_cpu_id | Mark Gross | 2020-06-11 | 1 | -0/+27 |
| * | mm: Fix mremap not considering huge pmd devmap | Fan Yang | 2020-06-11 | 1 | -0/+1 |
| * | x86/dma: Fix max PFN arithmetic overflow on 32 bit systems | Alexander Dahl | 2020-06-03 | 1 | -1/+1 |
| * | x86: Fix early boot crash on gcc-10, third try | Borislav Petkov | 2020-05-20 | 1 | -1/+6 |
| * | x86/asm: Add instruction suffixes to bitops | Jan Beulich | 2020-05-20 | 2 | -14/+17 |
| * | x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) feature | Fenghua Yu | 2020-04-24 | 1 | -1/+1 |
