summaryrefslogtreecommitdiff
path: root/arch/x86/kernel/cpu/common.c
Commit message (Expand)AuthorAgeFilesLines
* x86/bugs: Add "unknown" reporting for MMIO Stale DataPawan Gupta2022-09-051-11/+23
* x86/speculation/mmio: Reuse SRBDS mitigation for SBDSPawan Gupta2022-06-161-7/+14
* x86/speculation/mmio: Enumerate Processor MMIO Stale Data bugPawan Gupta2022-06-161-2/+41
* x86/cpu: Move x86_cache_bits settingsSuraj Jitindar Singh2020-07-221-1/+1
* x86/speculation: Add Special Register Buffer Data Sampling (SRBDS) mitigationMark Gross2020-06-111-0/+31
* x86/cpu: Add 'table' argument to cpu_matches()Mark Gross2020-06-111-10/+13
* x86/pkeys: Manually set X86_FEATURE_OSPKE to preserve existing changesSean Christopherson2020-03-111-1/+1
* x86/CPU: Change query logic so CPUID is enabled before testingMatthew Whitehead2019-11-201-1/+3
* x86/cpu: Add Tremont to the cpu vulnerability whitelistPawan Gupta2019-11-121-0/+2
* x86/bugs: Add ITLB_MULTIHIT bug infrastructureVineela Tummalapalli2019-11-121-28/+33
* x86/speculation/taa: Add mitigation for TSX Async AbortPawan Gupta2019-11-121-0/+15
* x86/cpu: Add a "tsx=" cmdline option with TSX disabled by defaultPawan Gupta2019-11-121-0/+1
* x86/cpu: Add a helper function x86_read_arch_cap_msr()Pawan Gupta2019-11-121-4/+11
* x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGSThomas Gleixner2019-08-061-15/+27
* x86/cpufeatures: Combine word 11 and 12 into a new scattered features wordFenghua Yu2019-08-061-23/+15
* x86/cpufeatures: Carve out CQM features retrievalBorislav Petkov2019-08-061-27/+33
* x86/speculation/mds: Add BUG_MSBDS_ONLYThomas Gleixner2019-05-141-8/+12
* x86/speculation/mds: Add basic bug infrastructure for MDSAndi Kleen2019-05-141-8/+15
* x86/speculation: Consolidate CPU whitelistsThomas Gleixner2019-05-141-49/+56
* x86/cpu: Sanitize FAM6_ATOM namingPeter Zijlstra2019-05-141-14/+14
* x86/speculation: Simplify the CPU bug detection logicDominik Brodowski2019-05-141-15/+7
* x86/bugs: Add AMD's SPEC_CTRL MSR usageKonrad Rzeszutek Wilk2018-12-051-0/+6
* x86/bugs: Add AMD's variant of SSB_NOKonrad Rzeszutek Wilk2018-12-051-1/+2
* x86/speculation: Support Enhanced IBRS on future CPUsSai Praneeth2018-11-131-0/+3
* x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+Andi Kleen2018-09-051-0/+1
* x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be presentBorislav Petkov2018-08-151-0/+7
* x86/cpu/common: Provide detect_ht_early()Thomas Gleixner2018-08-151-10/+14
* x86/cpu: Remove the pointless CPU printoutThomas Gleixner2018-08-151-15/+5
* x86/speculation/l1tf: Add sysfs reporting for l1tfAndi Kleen2018-08-151-0/+20
* x86/bugs: Rename SSBD_NO to SSB_NOKonrad Rzeszutek Wilk2018-05-221-1/+1
* KVM: SVM: Implement VIRT_SPEC_CTRL support for SSBDTom Lendacky2018-05-221-1/+2
* x86/cpufeatures: Disentangle SSBD enumerationThomas Gleixner2018-05-221-0/+3
* x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRSThomas Gleixner2018-05-221-2/+7
* x86/speculation: Use synthetic bits for IBRS/IBPB/STIBPBorislav Petkov2018-05-221-4/+10
* x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk2018-05-221-1/+1
* x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requestedKonrad Rzeszutek Wilk2018-05-221-0/+4
* x86/bugs/intel: Set proper CPU features and setup RDSKonrad Rzeszutek Wilk2018-05-221-4/+6
* x86/bugs: Expose /sys/../spec_store_bypassKonrad Rzeszutek Wilk2018-05-221-0/+23
* x86/bugs: Concentrate bug detection into a separate functionKonrad Rzeszutek Wilk2018-05-221-10/+11
* x86/CPU: Check CPU feature bits after microcode upgradeBorislav Petkov2018-04-121-0/+20
* x86/CPU: Add a microcode loader callbackBorislav Petkov2018-04-121-0/+10
* x86/cpu: Change type of x86_cache_size variable to unsigned intGustavo A. R. Silva2018-02-221-1/+1
* x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang2018-02-221-4/+4
* x86/pti: Mark constant arrays as __initconstArnd Bergmann2018-02-071-2/+2
* x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on IntelDavid Woodhouse2018-02-071-0/+21
* x86/pti: Do not enable PTI on CPUs which are not vulnerable to MeltdownDavid Woodhouse2018-02-071-5/+43
* x86/cpufeatures: Add CPUID_7_EDX CPUID leafDavid Woodhouse2018-02-071-0/+1
* x86/spectre: Add boot time option to select Spectre v2 mitigationDavid Woodhouse2018-01-171-4/+0
* x86/retpoline: Add initial retpoline supportDavid Woodhouse2018-01-171-0/+4
* x86/cpufeatures: Add X86_BUG_SPECTRE_V[12]David Woodhouse2018-01-171-0/+3
View Lorry Controller Status