| Commit message (Expand) | Author | Age | Files | Lines |
* | clk: exynos7: Mark aclk_fsys1_200 as critical | Paweł Chmiel | 2021-05-19 | 1 | -1/+6 |
* | clk: uniphier: Fix potential infinite loop | Colin Ian King | 2021-05-14 | 1 | -2/+2 |
* | clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE | Chen Hui | 2021-05-14 | 1 | -0/+1 |
* | clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE | Chen Hui | 2021-05-14 | 1 | -0/+1 |
* | clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable | Quanyang Wang | 2021-05-14 | 1 | -1/+11 |
* | clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback | Quanyang Wang | 2021-05-14 | 1 | -6/+6 |
* | clk: imx: Fix reparenting of UARTs not associated with stdout | Adam Ford | 2021-05-14 | 16 | -252/+54 |
* | media: aspeed: fix clock handling logic | Jae Hyun Yoo | 2021-05-14 | 1 | -2/+2 |
* | clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0 | Pali Rohár | 2021-05-14 | 1 | -6/+39 |
* | clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz | Pali Rohár | 2021-05-14 | 1 | -5/+7 |
* | clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock | Marek Behún | 2021-05-14 | 1 | -28/+0 |
* | clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return | Colin Ian King | 2021-05-11 | 1 | -0/+1 |
* | clk: socfpga: fix iomem pointer cast on 64-bit | Krzysztof Kozlowski | 2021-04-14 | 1 | -1/+1 |
* | clk: fix invalid usage of list cursor in unregister | Lukasz Bartosik | 2021-04-14 | 1 | -17/+13 |
* | clk: fix invalid usage of list cursor in register | Lukasz Bartosik | 2021-04-14 | 1 | -9/+8 |
* | clk: qcom: gcc-sc7180: Use floor ops for the correct sdcc1 clk | Douglas Anderson | 2021-03-30 | 1 | -2/+2 |
* | clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc | AngeloGioacchino Del Regno | 2021-03-17 | 1 | -2/+6 |
* | clk: qcom: gdsc: Implement NO_RET_PERIPH flag | AngeloGioacchino Del Regno | 2021-03-17 | 2 | -3/+10 |
* | clk: aspeed: Fix APLL calculate formula from ast2600-A2 | Ryan Chen | 2021-03-04 | 1 | -10/+27 |
* | clk: divider: fix initialization with parent_hw | Michael Tretter | 2021-03-04 | 1 | -2/+7 |
* | clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs | AngeloGioacchino Del Regno | 2021-03-04 | 1 | -50/+50 |
* | clk: sunxi-ng: h6: Fix clock divider range on some clocks | Andre Przywara | 2021-03-04 | 1 | -4/+4 |
* | clk: renesas: r8a779a0: Fix parent of CBFUSA clock | Geert Uytterhoeven | 2021-03-04 | 1 | -1/+1 |
* | clk: renesas: r8a779a0: Remove non-existent S2 clock | Geert Uytterhoeven | 2021-03-04 | 1 | -1/+0 |
* | clk: sunxi-ng: h6: Fix CEC clock | Andre Przywara | 2021-03-04 | 1 | -1/+1 |
* | clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() | Martin Blumenstingl | 2021-03-04 | 1 | -2/+3 |
* | clk: meson: clk-pll: make "ret" a signed integer | Martin Blumenstingl | 2021-03-04 | 1 | -1/+2 |
* | clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL | Martin Blumenstingl | 2021-03-04 | 1 | -1/+1 |
* | clk: sunxi-ng: mp: fix parent rate change flag check | Jernej Skrabec | 2021-02-17 | 1 | -1/+1 |
* | clk: qcom: gcc-sm250: Use floor ops for sdcc clks | Dmitry Baryshkov | 2021-02-03 | 1 | -2/+2 |
* | clk: mmp2: fix build without CONFIG_PM | Arnd Bergmann | 2021-02-03 | 1 | -2/+4 |
* | clk: imx: fix Kconfig warning for i.MX SCU clk | Arnd Bergmann | 2021-02-03 | 1 | -2/+0 |
* | clk: tegra30: Add hda clock default rates to clock driver | Peter Geis | 2021-01-27 | 1 | -0/+2 |
* | clk: tegra: Do not return 0 on failure | Nicolin Chen | 2020-12-30 | 1 | -2/+2 |
* | clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 | Terry Zhou | 2020-12-30 | 1 | -2/+2 |
* | clk: ingenic: Fix divider calculation with div tables | Paul Cercueil | 2020-12-30 | 1 | -4/+10 |
* | clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" | Geert Uytterhoeven | 2020-12-30 | 1 | -2/+2 |
* | clk: sunxi-ng: Make sure divider tables have sentinel | Jernej Skrabec | 2020-12-30 | 2 | -0/+2 |
* | clk: s2mps11: Fix a resource leak in error handling paths in the probe function | Christophe JAILLET | 2020-12-30 | 1 | -0/+1 |
* | clk: at91: sam9x60: remove atmel,osc-bypass support | Alexandre Belloni | 2020-12-30 | 1 | -5/+1 |
* | clk: at91: sama7g5: fix compilation error | Claudiu Beznea | 2020-12-30 | 1 | -2/+4 |
* | clk: bcm: dvp: Add MODULE_DEVICE_TABLE() | Nicolas Saenz Julienne | 2020-12-30 | 1 | -0/+1 |
* | clk: ti: Fix memleak in ti_fapll_synth_setup | Zhang Qilong | 2020-12-30 | 1 | -2/+9 |
* | clk: tegra: Fix duplicated SE clock entry | Dmitry Osipenko | 2020-12-30 | 2 | -1/+2 |
* | clk: qcom: gcc-sc7180: Use floor ops for sdcc clks | Douglas Anderson | 2020-12-30 | 1 | -2/+2 |
* | clk: renesas: r8a779a0: Fix R and OSC clocks | Geert Uytterhoeven | 2020-12-30 | 1 | -3/+10 |
* | clk: fsl-sai: fix memory leak | Michael Walle | 2020-12-30 | 1 | -0/+12 |
* | clk: meson: Kconfig: fix dependency for G12A | Kevin Hilman | 2020-12-30 | 1 | -0/+1 |
* | clk: renesas: r9a06g032: Drop __packed for portability | Geert Uytterhoeven | 2020-12-07 | 1 | -1/+1 |
* | clk: imx: scu: fix MXC_CLK_SCU module build break | Dong Aisheng | 2020-12-07 | 1 | -2/+2 |