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path: root/drivers/gpu/drm/i915/i915_gem_tiling.c
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* drm/i915: Only the zap the VMA after updating the tiling parametersChris Wilson2012-05-031-2/+6
* drm/i915: Clarify the semantics of tiling_changedChris Wilson2012-05-031-1/+9
* drm/i915: swizzling support for snb/ivbDaniel Vetter2012-02-081-2/+17
* drm/i915: fix swizzle detection for gen3Daniel Vetter2012-01-301-2/+2
* drm/i915: simplify swapin/out swizzle checking a bitDaniel Vetter2011-10-201-10/+0
* drm/i915: fix swizzling on gen6+Daniel Vetter2011-10-201-1/+4
* drm/i915: Fix unfenced alignment on pre-G33 hardwareChris Wilson2011-07-181-1/+3
* drm/i915: add swizzle/tiling support for Ivy BridgeJesse Barnes2011-05-131-1/+1
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-03-071-19/+19
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| * drm/i915: Rebind the buffer if its alignment constraints changes with tilingChris Wilson2011-03-071-4/+17
| * Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"Chris Wilson2011-03-061-15/+1
* | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-03-011-1/+15
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| * drm/i915: fix corruptions on i8xx due to relaxed fencingDaniel Vetter2011-02-241-1/+15
* | drm/i915: Protect against drm_gem_object not being the first memberChris Wilson2011-02-221-2/+2
* | drm/i915: Defer reporting EIO until we try to use the GPUChris Wilson2011-01-271-5/+0
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* drm/i915: Pipelined fencing [infrastructure]Chris Wilson2010-12-021-16/+7
* drm/i915: Use drm_i915_gem_object as the preferred typeChris Wilson2010-11-231-55/+49
* drm/i915: Fix current tiling check for relaxed fencingChris Wilson2010-11-151-8/+14
* drm/i915: Only enforce fence limits inside the GTT.Chris Wilson2010-10-291-11/+21
* drm/i915: IS_IRONLAKE is synonymous with gen == 5Chris Wilson2010-10-211-1/+1
* drm/i915: Adjust hangcheck EIO semanticsChris Wilson2010-09-251-1/+5
* drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965gChris Wilson2010-09-211-14/+16
* drm/i915: Allow get_fence_reg() to be uninterruptibleChris Wilson2010-09-141-1/+1
* drm/i915: Remove impossible error handling from bit17 swizzlingChris Wilson2010-09-081-11/+3
* drm: Use ENOENT consistently for the error return for an unmatched handle.Chris Wilson2010-08-101-2/+2
* drm/i915: Remove the WARN when failing to set tiling.Chris Wilson2010-08-011-2/+0
* drm/i915: don't allow tiling changes on pinned buffers v2Daniel Vetter2010-05-101-0/+5
* drm/i915: fix tiling limits for i915 class hw v2Daniel Vetter2010-04-181-13/+9
* drm/i915: introduce to_intel_bo helperDaniel Vetter2010-03-251-5/+5
* drm/intel: fix up set_tiling for untiled->tiled transitionDaniel Vetter2010-03-181-2/+5
* drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.Eric Anholt2010-02-261-1/+1
* Merge remote branch 'anholt/drm-intel-next' into drm-next-stageDave Airlie2010-02-251-162/+1
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| * drm/i915: reduce some of the duplication of tiling checkingOwain Ainsworth2010-02-221-34/+1
| * drm/i915: blow away userspace mappings before fence changeDaniel Vetter2010-02-221-6/+0
| * drm/i915: Keep MCHBAR always enabledZhenyu Wang2010-02-161-122/+0
* | Use drm_gem_object_[handle_]unreference_unlocked where possibleLuca Barbieri2010-02-111-3/+1
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* drm/i915: execbuf2 supportJesse Barnes2010-01-061-24/+22
* drm/i915: Fix product names and #definesAdam Jackson2009-12-071-2/+2
* drm/i915: Replace DRM_DEBUG with DRM_DEBUG_DRIVERZhao Yakui2009-11-051-1/+1
* drm/i915: get the bridge device once.Dave Airlie2009-09-081-45/+20
* drm/i915: fix tiling on IGDNGZhenyu Wang2009-09-041-8/+7
* drm/i915: Zap the GTT mapping when transitioning from untiled to tiled.Eric Anholt2009-07-101-0/+6
* drm/i915: check for CONFIG_PNP before using pnp functionKeith Packard2009-06-181-0/+2
* drm/i915: Clear fence register on tiling stride change.Chris Wilson2009-06-181-16/+51
* drm/i915: enable MCHBAR if neededJesse Barnes2009-06-091-0/+145
* drm/i915: Disable tiling on IGDNG for nowZhenyu Wang2009-06-051-0/+7
* drm/i915: Fix tiling pitch handling on 8xx.Eric Anholt2009-05-261-3/+11
* drm/i915: fix transition to I915_TILING_NONEKeith Packard2009-04-171-1/+0
* drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU.Eric Anholt2009-04-081-2/+109
* drm/i915: fix up tiling/fence reg setup on i8xx class hwDaniel Vetter2009-04-011-0/+16
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