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path: root/drivers/gpu/drm/i915/intel_hdmi.c
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* drm/i915: Respect alternate_ddc_pin for all DDI portsVille Syrjälä2016-11-181-36/+48
* Revert "drm/i915: Check live status before reading edid"David Weinehall2016-10-311-29/+7
* drm/i915: Check VBT for port presence in addition to the strap on VLV/CHVVille Syrjälä2016-09-151-0/+3
* drm/i915: Fake HDMI live statusShashank Sharma2016-05-111-2/+10
* drm/i915: increase the tries for HDMI hotplug live status checkingGary Wang2015-12-301-1/+1
* drm/i915: Correct max delay for HDMI hotplug live status checkingGary Wang2015-12-221-3/+4
* drm/i915: mdelay(10) considered harmfulDaniel Vetter2015-12-221-1/+1
* drm/i915: take a power domain reference while checking the HDMI live statusImre Deak2015-12-021-0/+4
* drm/i915: Introduce a gmbus power domainVille Syrjälä2015-12-021-6/+2
* drm/i915: Parametrize HSW video DIP data registersVille Syrjälä2015-10-131-12/+14
* Revert "drm/i915: Add hot_plug hook for hdmi encoder"Daniel Vetter2015-10-081-43/+11
* drm/i915: Add hot_plug hook for hdmi encoderSonika Jindal2015-10-061-11/+43
* drm/i915: Don't bypass LRC on CHVVille Syrjälä2015-10-061-5/+0
* drm/i915: Add HDMI aspect ratio property for SDVOVille Syrjälä2015-09-301-9/+0
* drm/i915: Constify adjusted_modeVille Syrjälä2015-09-301-11/+11
* drm/i915: Move HDMI aspect ratio setup to .compute_config()Ville Syrjälä2015-09-301-3/+3
* drm/i915: Always call the adjusted mode 'adjusted_mode'Ville Syrjälä2015-09-301-6/+3
* drm/i915: Check live status before reading edidSonika Jindal2015-09-231-7/+21
* drm/i915: add attached connector to hdmi containerShashank Sharma2015-09-101-0/+1
* Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queuedDaniel Vetter2015-09-021-0/+21
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| * drm/i915: Enable HDMI on DDI-EXiong Zhang2015-08-311-0/+21
* | drm/i915: Clean up CHV lane soft reset programmingVille Syrjälä2015-09-011-39/+52
* | drm/i915: Trick CL2 into life on CHV when using pipe B with port BVille Syrjälä2015-08-261-0/+23
* | drm/i915: Implement PHY lane power gating for CHVVille Syrjälä2015-08-261-0/+4
* | drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer dis...Ville Syrjälä2015-08-261-0/+23
* | drm/i915: Always program unique transition scale for CHVVille Syrjälä2015-08-261-14/+16
* | drm/i915: Clean up DP/HDMI limited color range handlingVille Syrjälä2015-08-141-14/+12
* | drm/i915/bxt: WA for swapped HPD pins in A steppingSonika Jindal2015-08-141-1/+8
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* drm/i915: Get rid of dpms handling.Maarten Lankhorst2015-08-141-1/+1
* drm/i915: Adjust BXT HDMI port clock limitsVille Syrjälä2015-07-131-3/+6
* Revert "drm/i915: Disable 12bpc hdmi for now"Ville Syrjälä2015-07-061-2/+1
* drm/i915: Account for CHV/BXT DPLL clock limitationsVille Syrjälä2015-07-061-15/+43
* drm/i915: Bump HDMI min port clock to 25 MHzVille Syrjälä2015-07-061-1/+1
* drm/i915: Double the port clock when using double clocked modes with 12bpcVille Syrjälä2015-06-151-0/+1
* drm/i915: Fix hdmi clock readout with pixel repeatVille Syrjälä2015-06-151-0/+3
* drm/i915: Check infoframe state more diligently.Ville Syrjälä2015-06-151-12/+32
* drm/i915: Disable all infoframes when turning off the HDMI portVille Syrjälä2015-06-151-45/+40
* drm/i915: Fix 12bpc HDMI enable for IBXVille Syrjälä2015-06-151-25/+53
* drm/i915: Enable default_phase in GCP when possibleVille Syrjälä2015-06-151-0/+48
* drm/i915: Send GCP infoframes for deep color HDMI sinksVille Syrjälä2015-06-151-0/+74
* drm/i915: Implement WaEnableHDMI8bpcBefore12bpc:snb, ivbVille Syrjälä2015-06-151-6/+68
* drm/i915: Disable 12bpc hdmi for nowDaniel Vetter2015-05-281-1/+2
* drm/i915: s/dpio_lock/sb_lock/Ville Syrjälä2015-05-281-12/+12
* drm/i915: Disable HDMI port after the pipe on PCH platformsVille Syrjälä2015-05-211-4/+29
* drm/i915: Fix the IBX transcoder B workaroundsVille Syrjälä2015-05-211-27/+23
* drm/i915: Remove the double register write from intel_disable_hdmi()Ville Syrjälä2015-05-211-8/+0
* drm/i915: Remove a bogus 12bpc "toggle" from intel_disable_hdmi()Ville Syrjälä2015-05-211-8/+0
* drm/i915: Only wait for required lanes in vlv_wait_port_ready()Ville Syrjälä2015-05-081-2/+2
* drm/i915: Implement chv display PHY lane stagger setupVille Syrjälä2015-05-081-2/+33
* drm/i915: Use for_each_connector_in_state helper macroAnder Conselvan de Oliveira2015-05-081-5/+2
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