| Commit message (Expand) | Author | Age | Files | Lines |
* | drm/i915/psr: Use ->get_aux_send_ctl functions | Daniel Vetter | 2016-05-20 | 1 | -21/+4 |
* | drm/i915/psr: Order DP aux transactions correctly | Daniel Vetter | 2016-05-20 | 1 | -7/+7 |
* | drm/i915/psr: Make idle_frames sensible again | Daniel Vetter | 2016-05-20 | 1 | -7/+7 |
* | drm/i915/psr: Try to program link training times correctly | Daniel Vetter | 2016-05-20 | 1 | -8/+47 |
* | drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev) | Joonas Lahtinen | 2016-04-07 | 1 | -1/+1 |
* | Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview." | Ville Syrjälä | 2016-03-10 | 1 | -2/+1 |
* | drm/i915: Add wait_for_us | Tvrtko Ursulin | 2016-03-03 | 1 | -1/+2 |
* | drm/i915: Enable PSR by default on Haswell and Broadwell. | Rodrigo Vivi | 2016-02-17 | 1 | -1/+2 |
* | drm/i915: Enable PSR by default on Valleyview and Cherryview. | Rodrigo Vivi | 2016-02-17 | 1 | -1/+4 |
* | drm/i915: Change i915.enable_psr parameter to use per platform default. | Rodrigo Vivi | 2016-02-17 | 1 | -0/+5 |
* | drm/i915: Instrument PSR parameter for debuging with link standby x link off. | Rodrigo Vivi | 2016-02-01 | 1 | -0/+17 |
* | drm/i915: Add PSR main link standby support back | Rodrigo Vivi | 2016-02-01 | 1 | -7/+19 |
* | drm/i915: PSR simplify port and link standby checks. | Rodrigo Vivi | 2016-02-01 | 1 | -3/+10 |
* | drm/i915: PSR also doesn't have link_entry_time on SKL. | Rodrigo Vivi | 2015-12-11 | 1 | -2/+3 |
* | drm/i915: Separate cherryview from valleyview | Wayne Boyer | 2015-12-10 | 1 | -3/+3 |
* | drm/i915: Fix idle_frames counter. | Rodrigo Vivi | 2015-12-07 | 1 | -13/+7 |
* | drm/i915: Also disable PSR on Sink when disabling it on Source. | Rodrigo Vivi | 2015-11-24 | 1 | -0/+4 |
* | drm/i915: PSR: Mask LPSP hw tracking back again. | Rodrigo Vivi | 2015-11-24 | 1 | -2/+7 |
* | drm/i915: PSR: Let's rely more on frontbuffer tracking. | Rodrigo Vivi | 2015-11-24 | 1 | -19/+3 |
* | drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink. | Rodrigo Vivi | 2015-11-24 | 1 | -3/+0 |
* | drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT. | Rodrigo Vivi | 2015-11-18 | 1 | -4/+0 |
* | drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT. | Rodrigo Vivi | 2015-11-18 | 1 | -1/+0 |
* | drm/i915: Reduce PSR re-activation time for VLV/CHV. | Rodrigo Vivi | 2015-11-18 | 1 | -2/+1 |
* | drm/i915: Delay first PSR activation. | Rodrigo Vivi | 2015-11-18 | 1 | -2/+16 |
* | drm/i915: Type safe register read/write | Ville Syrjälä | 2015-11-18 | 1 | -6/+6 |
* | drm/i915: Model PSR AUX register selection more like the normal AUX code | Ville Syrjälä | 2015-11-16 | 1 | -6/+21 |
* | drm/i915: Add dev_priv->psr_mmio_base | Ville Syrjälä | 2015-11-16 | 1 | -12/+15 |
* | drm/i915: Parametrize AUX registers | Ville Syrjälä | 2015-11-16 | 1 | -2/+3 |
* | drm/i915: Parametrize HSW video DIP data registers | Ville Syrjälä | 2015-10-13 | 1 | -8/+10 |
* | drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR. | Rodrigo Vivi | 2015-08-05 | 1 | -1/+2 |
* | drm/i915: PSR: Increase idle_frames | Rodrigo Vivi | 2015-07-09 | 1 | -2/+5 |
* | drm/i915: PSR: Remove Low Power HW tracking mask. | Rodrigo Vivi | 2015-07-09 | 1 | -1/+1 |
* | drm/i915: PSR: Flush means invalidate + flush | Rodrigo Vivi | 2015-07-09 | 1 | -19/+21 |
* | drm/i915/psr: Restrict single-shot updates to the PSR pipe | Daniel Vetter | 2015-06-24 | 1 | -9/+13 |
* | drm/i915/psr: Restrict buffer tracking to the PSR pipe | Daniel Vetter | 2015-06-24 | 1 | -4/+7 |
* | drm/i915: PSR VLV: Add single frame update. | Rodrigo Vivi | 2015-04-14 | 1 | -0/+42 |
* | drm/i915: PSR: deprecate link_standby support for core platforms. | Rodrigo Vivi | 2015-04-14 | 1 | -16/+10 |
* | drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logic | Rodrigo Vivi | 2015-04-14 | 1 | -4/+9 |
* | drm/i915: PSR: Remove wrong LINK_DISABLE. | Rodrigo Vivi | 2015-04-14 | 1 | -2/+1 |
* | drm/i915/skl: Enabling PSR2 SU with frame sync | Sonika Jindal | 2015-04-07 | 1 | -1/+37 |
* | drm/i915: PSR: Keep sink state consistent with source | Durgadoss R | 2015-03-30 | 1 | -1/+1 |
* | drm/i915: Remove duplicated psr.active unset | Rodrigo Vivi | 2015-03-26 | 1 | -2/+0 |
* | drm/i915/skl: Enabling PSR on Skylake | Sonika Jindal | 2015-01-28 | 1 | -2/+24 |
* | drm/i915: Make intel_crtc->config a pointer | Ander Conselvan de Oliveira | 2015-01-27 | 1 | -4/+4 |
* | drm/i915: Embedded struct drm_crtc_state in intel_crtc_state | Ander Conselvan de Oliveira | 2015-01-27 | 1 | -1/+1 |
* | drm/i915: group link_standby setup and let this info visible everywhere. | Rodrigo Vivi | 2015-01-15 | 1 | -10/+9 |
* | drm/i915: Add missing vbt check. | Rodrigo Vivi | 2015-01-15 | 1 | -1/+1 |
* | drm/i915: PSR HSW/BDW: Fix inverted logic at sink main_link_active bit. | Rodrigo Vivi | 2015-01-15 | 1 | -2/+2 |
* | drm/i915: PSR VLV/CHV: Remove condition checks that only applies to Haswell. | Rodrigo Vivi | 2015-01-15 | 1 | -8/+5 |
* | drm/i915: VLV/CHV PSR needs to exit PSR on every flush. | Rodrigo Vivi | 2015-01-15 | 1 | -4/+2 |