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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2015-10-28 15:13:42 +0200
committerMark Brown <broonie@kernel.org>2015-10-30 11:18:05 +0900
commitb7c08cf85c9a3a4b05474b7acacc9fbce8fb3eaf (patch)
tree9dbec39b606014d645f16cc0195de40ff43b2f58 /include/linux/pxa2xx_ssp.h
parent8b136baa5892f25bba0373d6eb0f5f84efc93986 (diff)
downloadlinux-stable-b7c08cf85c9a3a4b05474b7acacc9fbce8fb3eaf.tar.gz
spi: pxa2xx: Add support for Intel Broxton
LPSS SPI in Intel Broxton is otherwise the same than in Intel Sunrisepoint but it supports up to four chip selects per port and has different FIFO thresholds. Patch adds support for two Broxton SoC variants. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/pxa2xx_ssp.h')
-rw-r--r--include/linux/pxa2xx_ssp.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 92273776bce6..c2f2574ff61c 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -198,6 +198,7 @@ enum pxa_ssp_type {
LPSS_LPT_SSP, /* Keep LPSS types sorted with lpss_platforms[] */
LPSS_BYT_SSP,
LPSS_SPT_SSP,
+ LPSS_BXT_SSP,
};
struct ssp_device {