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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-01-03 13:10:18 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-01-03 13:10:18 -0800 |
commit | 5f738967e89584f99c6a11c6bf09b16c50b6a03e (patch) | |
tree | c807b116deb121277799f316052349a5fa663af0 | |
parent | 2318aa272072f6906de8e00a332da1485506b3c5 (diff) | |
parent | 9fcb4cc2d7dd192ae718f0e7484c6f5c08b8af23 (diff) | |
download | linux-5f738967e89584f99c6a11c6bf09b16c50b6a03e.tar.gz |
Merge tag 'pinctrl-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl fixes from Linus Walleij:
"A first round of pinctrl fixes for v3.8:
- i.MX5 register configuration
- Swap a kfree to devm_kfree() to avoid memory corruption in the at91
driver
- Add the missing device tree binding doc for the SIRF pin controller
- Enable the SIRF GPIO pull up/down configuration from the device
tree, it was previously retired from the hard-coded approach.
- NULL check for the prcm_base in the Nomadik pin controller.
- Provide the prcm_base from the device tree in the DT boot path for
the Nomadik pin controller."
* tag 'pinctrl-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
ARM: ux500: add pinctrl address resources
pinctrl: nomadik: return if prcm_base is NULL
pinctrl: sirf: enable GPIO pullup/down configuration from dts
pinctrl: sirf: add missing DT-binding document
pinctrl: fix comment mistake
drivers/pinctrl/pinctrl-at91.c: convert kfree to devm_kfree
pinctrl: imx5: fix GPIO_8 pad CAN1_RXCAN configuration
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt | 47 | ||||
-rw-r--r-- | arch/arm/boot/dts/dbx5x0.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cpu-db8500.c | 3 | ||||
-rw-r--r-- | drivers/pinctrl/core.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-at91.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-imx53.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-nomadik.c | 11 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-sirf.c | 48 |
8 files changed, 113 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt new file mode 100644 index 000000000000..c596a6ad3285 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt @@ -0,0 +1,47 @@ +CSR SiRFprimaII pinmux controller + +Required properties: +- compatible : "sirf,prima2-pinctrl" +- reg : Address range of the pinctrl registers +- interrupts : Interrupts used by every GPIO group +- gpio-controller : Indicates this device is a GPIO controller +- interrupt-controller : Marks the device node as an interrupt controller +Optional properties: +- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m +- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m + +Please refer to pinctrl-bindings.txt in this directory for details of the common +pinctrl bindings used by client devices. + +SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes. +Each of these subnodes represents some desired configuration for a group of pins. + +Required subnode-properties: +- sirf,pins : An array of strings. Each string contains the name of a group. +- sirf,function: A string containing the name of the function to mux to the + group. + + Valid values for group and function names can be found from looking at the + group and function arrays in driver files: + drivers/pinctrl/pinctrl-sirf.c + +For example, pinctrl might have subnodes like the following: + uart2_pins_a: uart2@0 { + uart { + sirf,pins = "uart2grp"; + sirf,function = "uart2"; + }; + }; + uart2_noflow_pins_a: uart2@1 { + uart { + sirf,pins = "uart2_nostreamctrlgrp"; + sirf,function = "uart2_nostreamctrl"; + }; + }; + +For a specific board, if it wants to use uart2 without hardware flow control, +it can add the following to its board-specific .dts file. +uart2: uart@0xb0070000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_noflow_pins_a>; +} diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 2efd9c891bc9..63f2fbcfe819 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -170,7 +170,9 @@ gpio-bank = <8>; }; - pinctrl { + pinctrl@80157000 { + // This is actually the PRCMU base address + reg = <0x80157000 0x2000>; compatible = "stericsson,nmk_pinctrl"; }; diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index db0bb75e2c76..5b286e06474c 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -285,7 +285,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), /* Requires device name bindings. */ - OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), + OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE, + "pinctrl-db8500", NULL), /* Requires clock name and DMA bindings. */ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, "ux500-msp-i2s.0", &msp0_platform_data), diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 5cdee8669ea3..59f5a965bdc4 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -700,7 +700,7 @@ static struct pinctrl *create_pinctrl(struct device *dev) } } - /* Add the pinmux to the global list */ + /* Add the pinctrl handle to the global list */ list_add_tail(&p->node, &pinctrl_list); return p; diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index c5e757157183..bff54bfaff43 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -265,7 +265,7 @@ static int at91_dt_node_to_map(struct pinctrl_dev *pctldev, /* create mux map */ parent = of_get_parent(np); if (!parent) { - kfree(new_map); + devm_kfree(pctldev->dev, new_map); return -EINVAL; } new_map[0].type = PIN_MAP_TYPE_MUX_GROUP; diff --git a/drivers/pinctrl/pinctrl-imx53.c b/drivers/pinctrl/pinctrl-imx53.c index ec4048691775..af571dc3dc63 100644 --- a/drivers/pinctrl/pinctrl-imx53.c +++ b/drivers/pinctrl/pinctrl-imx53.c @@ -1371,7 +1371,7 @@ static struct imx_pin_reg imx53_pin_regs[] = { IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 0, 0x7F8, 1), /* MX53_PAD_GPIO_8__ESAI1_TX5_RX0 */ IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 1, 0x000, 0), /* MX53_PAD_GPIO_8__GPIO1_8 */ IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 2, 0x000, 0), /* MX53_PAD_GPIO_8__EPIT2_EPITO */ - IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 3), /* MX53_PAD_GPIO_8__CAN1_RXCAN */ + IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 2), /* MX53_PAD_GPIO_8__CAN1_RXCAN */ IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 4, 0x880, 5), /* MX53_PAD_GPIO_8__UART2_RXD_MUX */ IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 5, 0x000, 0), /* MX53_PAD_GPIO_8__FIRI_TXD */ IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 6, 0x000, 0), /* MX53_PAD_GPIO_8__SPDIF_SRCLK */ diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c index ef66f98e9202..015b093287a4 100644 --- a/drivers/pinctrl/pinctrl-nomadik.c +++ b/drivers/pinctrl/pinctrl-nomadik.c @@ -259,6 +259,9 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, const struct prcm_gpiocr_altcx_pin_desc *pin_desc; const u16 *gpiocr_regs; + if (!npct->prcm_base) + return; + if (alt_num > PRCM_IDX_GPIOCR_ALTC_MAX) { dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n", alt_num); @@ -682,6 +685,9 @@ static int nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) const struct prcm_gpiocr_altcx_pin_desc *pin_desc; const u16 *gpiocr_regs; + if (!npct->prcm_base) + return NMK_GPIO_ALT_C; + for (i = 0; i < npct->soc->npins_altcx; i++) { if (npct->soc->altcx_pins[i].pin == gpio) break; @@ -1887,9 +1893,12 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev) "failed to ioremap PRCM registers\n"); return -ENOMEM; } - } else { + } else if (version == PINCTRL_NMK_STN8815) { dev_info(&pdev->dev, "No PRCM base, assume no ALT-Cx control is available\n"); + } else { + dev_err(&pdev->dev, "missing PRCM base address\n"); + return -EINVAL; } /* diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c index a4f0c5e487d5..30e1a38293a0 100644 --- a/drivers/pinctrl/pinctrl-sirf.c +++ b/drivers/pinctrl/pinctrl-sirf.c @@ -1663,6 +1663,44 @@ const struct irq_domain_ops sirfsoc_gpio_irq_simple_ops = { .xlate = irq_domain_xlate_twocell, }; +static void sirfsoc_gpio_set_pullup(const u32 *pullups) +{ + int i, n; + const unsigned long *p = (const unsigned long *)pullups; + + for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) { + n = find_first_bit(p + i, BITS_PER_LONG); + while (n < BITS_PER_LONG) { + u32 offset = SIRFSOC_GPIO_CTRL(i, n); + u32 val = readl(sgpio_bank[i].chip.regs + offset); + val |= SIRFSOC_GPIO_CTL_PULL_MASK; + val |= SIRFSOC_GPIO_CTL_PULL_HIGH; + writel(val, sgpio_bank[i].chip.regs + offset); + + n = find_next_bit(p + i, BITS_PER_LONG, n + 1); + } + } +} + +static void sirfsoc_gpio_set_pulldown(const u32 *pulldowns) +{ + int i, n; + const unsigned long *p = (const unsigned long *)pulldowns; + + for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) { + n = find_first_bit(p + i, BITS_PER_LONG); + while (n < BITS_PER_LONG) { + u32 offset = SIRFSOC_GPIO_CTRL(i, n); + u32 val = readl(sgpio_bank[i].chip.regs + offset); + val |= SIRFSOC_GPIO_CTL_PULL_MASK; + val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH; + writel(val, sgpio_bank[i].chip.regs + offset); + + n = find_next_bit(p + i, BITS_PER_LONG, n + 1); + } + } +} + static int __devinit sirfsoc_gpio_probe(struct device_node *np) { int i, err = 0; @@ -1671,6 +1709,8 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np) struct platform_device *pdev; bool is_marco = false; + u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS]; + pdev = of_find_device_by_node(np); if (!pdev) return -ENODEV; @@ -1726,6 +1766,14 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np) irq_set_handler_data(bank->parent_irq, bank); } + if (!of_property_read_u32_array(np, "sirf,pullups", pullups, + SIRFSOC_GPIO_NO_OF_BANKS)) + sirfsoc_gpio_set_pullup(pullups); + + if (!of_property_read_u32_array(np, "sirf,pulldowns", pulldowns, + SIRFSOC_GPIO_NO_OF_BANKS)) + sirfsoc_gpio_set_pulldown(pulldowns); + return 0; out: |