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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-04-29 13:10:34 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-06-30 20:39:18 +0300 |
| commit | f6a7d3952cbed2c1e07d945dbb36f5c34200e9c1 (patch) | |
| tree | adf6011d4e18e70aef50714a6720b6dbe6d50893 | |
| parent | 42ae1f88feacc8643bc56dcfa55e0722967e424f (diff) | |
| download | linux-f6a7d3952cbed2c1e07d945dbb36f5c34200e9c1.tar.gz | |
drm/i915: Suppress spurious underruns on gen2
Often we seem to detect an underrun right after modeset on gen2.
It seems to be a spurious detection (potentially the pipe is still
in a wonky state when we enable the planes). An extra vblank wait
seems to cure it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200429101034.8208-13-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4fdc9ccfea2a..182cef0dc2fd 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7526,6 +7526,10 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state, intel_crtc_vblank_on(new_crtc_state); intel_encoders_enable(state, crtc); + + /* prevents spurious underruns */ + if (IS_GEN(dev_priv, 2)) + intel_wait_for_vblank(dev_priv, pipe); } static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) |