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authorThierry Reding <treding@nvidia.com>2017-12-13 12:53:43 +0100
committerThierry Reding <treding@nvidia.com>2017-12-13 12:53:43 +0100
commit029ab5eaf091ce5eaa1f3017f66fd1d10f431d61 (patch)
tree0796fd5e58f51c658b08790f0769131b167fc54a /Documentation/w1/masters
parentf580fd3f9d78cf0425ab98950796c578d8a82167 (diff)
downloadlinux-029ab5eaf091ce5eaa1f3017f66fd1d10f431d61.tar.gz
dt-bindings: memory: Add Tegra186 support
As opposed to earlier incarnations, the memory controller on Tegra186 no longer implements an SMMU. Instead the SMMU is a regular ARM SMMU and in a separate IP block. However, the memory controller programs the SMMU stream IDs for each of the memory clients. Add a header file with definitions for each of these stream IDs and mark the #iommu-cells property as required on Tegra30 to Tegra210 in the device tree bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
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