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author | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-29 19:15:32 -0200 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-29 19:15:32 -0200 |
commit | 19bf7f8ac3f8131100027281c495dbbe00cd5ae0 (patch) | |
tree | 270b97e3ca47c0f62a1babca2ae37f79a76a309c /arch/xtensa/include/uapi/asm/swab.h | |
parent | 787c57c0fb393fe8a3974d300ddcfe30373386fe (diff) | |
parent | 35fd3dc58da675d659513384221349ef90749a01 (diff) | |
download | linux-19bf7f8ac3f8131100027281c495dbbe00cd5ae0.tar.gz |
Merge remote-tracking branch 'master' into queue
Merge reason: development work has dependency on kvm patches merged
upstream.
Conflicts:
arch/powerpc/include/asm/Kbuild
arch/powerpc/include/asm/kvm_para.h
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'arch/xtensa/include/uapi/asm/swab.h')
-rw-r--r-- | arch/xtensa/include/uapi/asm/swab.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/xtensa/include/uapi/asm/swab.h b/arch/xtensa/include/uapi/asm/swab.h new file mode 100644 index 000000000000..226a39162310 --- /dev/null +++ b/arch/xtensa/include/uapi/asm/swab.h @@ -0,0 +1,70 @@ +/* + * include/asm-xtensa/swab.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _XTENSA_SWAB_H +#define _XTENSA_SWAB_H + +#include <linux/types.h> +#include <linux/compiler.h> + +#define __SWAB_64_THRU_32__ + +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) +{ + __u32 res; + /* instruction sequence from Xtensa ISA release 2/2000 */ + __asm__("ssai 8 \n\t" + "srli %0, %1, 16 \n\t" + "src %0, %0, %1 \n\t" + "src %0, %0, %0 \n\t" + "src %0, %1, %0 \n" + : "=&a" (res) + : "a" (x) + ); + return res; +} +#define __arch_swab32 __arch_swab32 + +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) +{ + /* Given that 'short' values are signed (i.e., can be negative), + * we cannot assume that the upper 16-bits of the register are + * zero. We are careful to mask values after shifting. + */ + + /* There exists an anomaly between xt-gcc and xt-xcc. xt-gcc + * inserts an extui instruction after putting this function inline + * to ensure that it uses only the least-significant 16 bits of + * the result. xt-xcc doesn't use an extui, but assumes the + * __asm__ macro follows convention that the upper 16 bits of an + * 'unsigned short' result are still zero. This macro doesn't + * follow convention; indeed, it leaves garbage in the upport 16 + * bits of the register. + + * Declaring the temporary variables 'res' and 'tmp' to be 32-bit + * types while the return type of the function is a 16-bit type + * forces both compilers to insert exactly one extui instruction + * (or equivalent) to mask off the upper 16 bits. */ + + __u32 res; + __u32 tmp; + + __asm__("extui %1, %2, 8, 8\n\t" + "slli %0, %2, 8 \n\t" + "or %0, %0, %1 \n" + : "=&a" (res), "=&a" (tmp) + : "a" (x) + ); + + return res; +} +#define __arch_swab16 __arch_swab16 + +#endif /* _XTENSA_SWAB_H */ |