diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2016-08-17 19:20:22 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-08-31 16:13:29 +0200 |
| commit | 5fb23e35cacffb7b99ed5b97a002ddb8c9144bb6 (patch) | |
| tree | 12fbda1d89c9530ce244072dce581df952b0345b /drivers/dma/dw | |
| parent | c072e113b8fbd6b2bf325e92379a0da6dea619b3 (diff) | |
| download | linux-5fb23e35cacffb7b99ed5b97a002ddb8c9144bb6.tar.gz | |
dmaengine: dw: override LLP support if asked in platform data
There are at least two known devices, e.g. DMA controller found on ARC AXS101
SDP board, that have LLP register and no multi block transfer support at the
same time.
Override autodetection by user provided data.
Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/dma/dw')
| -rw-r--r-- | drivers/dma/dw/core.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 80e74216cd56..da18b18561c4 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip) (dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0; } else { dwc->block_size = pdata->block_size; - - /* Check if channel supports multi block transfer */ - channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff)); - dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0; - channel_writel(dwc, LLP, 0); + dwc->nollp = pdata->is_nollp; } } |