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| author | Michel Dänzer <michel.daenzer@amd.com> | 2018-07-17 12:37:45 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-19 13:56:43 -0500 |
| commit | 4841203102a337b4b627e6dd3a1dc8c88aec982b (patch) | |
| tree | 213cb5f05821ebe28f4393e534778f44e36d25c4 /drivers/gpu/drm/amd/display/dc/dce110 | |
| parent | 1ce0688f3f6a9e9d34ae66bf779d54855def7bec (diff) | |
| download | linux-4841203102a337b4b627e6dd3a1dc8c88aec982b.tar.gz | |
drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 45388bff2c7d..33a14e163f88 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1250,7 +1250,7 @@ static void program_scaler(const struct dc *dc, { struct tg_color color = {0}; -#if defined(CONFIG_DRM_AMD_DC_DCN1_0) +#ifdef CONFIG_X86 /* TOFPGA */ if (pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth == NULL) return; |