diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-20 19:47:15 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-31 17:00:43 +0200 |
| commit | b4db3a8c689ba5f5ced764ab1377ad6411003b0b (patch) | |
| tree | 5b747654037e8c6b7ba716bbb458f2d47badac03 /drivers/gpu/drm/i915/display/intel_atomic.c | |
| parent | 54f09d2342b0516ce73ec02657db8d28fcfa637e (diff) | |
| download | linux-b4db3a8c689ba5f5ced764ab1377ad6411003b0b.tar.gz | |
drm/i915: Collect more cdclk state under the same roof
Move the min_cdclk[] and min_voltage_level[] arrays under the
rest of the cdclk state. And while at it provide a simple
helper (intel_cdclk_clear_state()) to clear the state during
the ww_mutex backoff dance.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-6-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_atomic.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_atomic.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index 9921b1fa4e70..014927edd5bc 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -35,6 +35,7 @@ #include <drm/drm_plane_helper.h> #include "intel_atomic.h" +#include "intel_cdclk.h" #include "intel_display_types.h" #include "intel_hdcp.h" #include "intel_psr.h" @@ -499,15 +500,13 @@ intel_atomic_state_alloc(struct drm_device *dev) void intel_atomic_state_clear(struct drm_atomic_state *s) { struct intel_atomic_state *state = to_intel_atomic_state(s); + drm_atomic_state_default_clear(&state->base); + state->dpll_set = state->modeset = false; state->global_state_changed = false; state->active_pipes = 0; - memset(&state->min_cdclk, 0, sizeof(state->min_cdclk)); - memset(&state->min_voltage_level, 0, sizeof(state->min_voltage_level)); - memset(&state->cdclk.logical, 0, sizeof(state->cdclk.logical)); - memset(&state->cdclk.actual, 0, sizeof(state->cdclk.actual)); - state->cdclk.pipe = INVALID_PIPE; + intel_cdclk_clear_state(state); } struct intel_crtc_state * |