summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/nouveau/nv50_graph.c
diff options
context:
space:
mode:
authorFrancisco Jerez <currojerez@riseup.net>2010-07-03 18:36:39 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-07-13 10:13:23 +1000
commit6e86e0419471d11ed3d4d46039ee90e8cb85806c (patch)
tree176b7ffdef1bd434bb4d9223f33d0f9de8b33ebc /drivers/gpu/drm/nouveau/nv50_graph.c
parent2ed06b7d974a750ccb90ff88f5b7a870b89db966 (diff)
downloadlinux-6e86e0419471d11ed3d4d46039ee90e8cb85806c.tar.gz
drm/nouveau: Fix a couple of sparse warnings.
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_graph.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index b203d06f601f..b04e7c8449a5 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -212,7 +212,7 @@ nv50_graph_create_context(struct nouveau_channel *chan)
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
- struct nouveau_gpuobj *ctx;
+ struct nouveau_gpuobj *obj;
struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
int hdr, ret;
@@ -223,7 +223,7 @@ nv50_graph_create_context(struct nouveau_channel *chan)
NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx);
if (ret)
return ret;
- ctx = chan->ramin_grctx->gpuobj;
+ obj = chan->ramin_grctx->gpuobj;
hdr = IS_G80 ? 0x200 : 0x20;
dev_priv->engine.instmem.prepare_access(dev, true);
@@ -241,12 +241,12 @@ nv50_graph_create_context(struct nouveau_channel *chan)
struct nouveau_grctx ctx = {};
ctx.dev = chan->dev;
ctx.mode = NOUVEAU_GRCTX_VALS;
- ctx.data = chan->ramin_grctx->gpuobj;
+ ctx.data = obj;
nv50_grctx_init(&ctx);
} else {
- nouveau_grctx_vals_load(dev, ctx);
+ nouveau_grctx_vals_load(dev, obj);
}
- nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
+ nv_wo32(dev, obj, 0x00000/4, chan->ramin->instance >> 12);
dev_priv->engine.instmem.finish_access(dev);
return 0;