diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2022-09-08 13:12:51 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2022-09-12 14:52:32 +0300 |
| commit | 2449ca713e6766b1caaf40c709272c0b392bf190 (patch) | |
| tree | 68e1c43047459b49e4caf05032a0cbe1224c8151 /drivers/net/wireless/realtek/rtw89 | |
| parent | ef16380b69b85ff42e03900f6f7014fb413b42a8 (diff) | |
| download | linux-2449ca713e6766b1caaf40c709272c0b392bf190.tar.gz | |
wifi: rtw89: 8852c: enlarge polling timeout of RX DCK
The range of calibration time of RX DCK is quite wide from ~40us to
~1300us by experiments, and probability is about 0.1% for the cases larger
than 1000us. Though it can retry calibration and get positive result, it
will spend more time. Therefore, enlarge it to avoid warning and duplicate
calibration.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220908051257.25353-4-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 1 | ||||
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 54cf725d5d0a..893c172ccd52 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -3366,6 +3366,7 @@ #define RR_DCK_FINE BIT(1) #define RR_DCK_LV BIT(0) #define RR_DCK1 0x93 +#define RR_DCK1_DONE BIT(5) #define RR_DCK1_CLR GENMASK(3, 0) #define RR_DCK1_SEL BIT(3) #define RR_DCK2 0x94 diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c index 478a36de1bd3..006c2cf93111 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c @@ -1546,7 +1546,8 @@ static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path) rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, - 2, 1000, false, rtwdev, path, 0x93, BIT(5)); + 2, 2000, false, rtwdev, path, + RR_DCK1, RR_DCK1_DONE); if (ret) rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path); else |