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authorZong-Zhe Yang <kevin_yang@realtek.com>2023-02-03 14:51:57 +0800
committerKalle Valo <kvalo@kernel.org>2023-02-13 19:19:16 +0200
commitddf9a2ead1676db46abe8acca3f689fd572a44d1 (patch)
tree8a04cadfbac48f610ad8ec3b7acbee7912f9879f /drivers/net/wireless/realtek
parent5466ee9a7c63e18d3daea0bf80152944648218d2 (diff)
downloadlinux-ddf9a2ead1676db46abe8acca3f689fd572a44d1.tar.gz
wifi: rtw89: phy: set TX power according to RF path number by chip
Previously, all supported chips had two RF paths. Therefore, these codes used static number for TX power setting. Now, we are planning to support a new chip which has only one RF path. So, we refine the setting codes to refer to chip's RF path number at runtime. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230203065157.8227-1-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek')
-rw-r--r--drivers/net/wireless/realtek/rtw89/phy.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c
index ca2b5c17d6da..d9f61ba3d176 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.c
+++ b/drivers/net/wireless/realtek/rtw89/phy.c
@@ -2042,6 +2042,7 @@ void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{
+ u8 max_nss_num = rtwdev->chip->rf_path_num;
static const u8 rs[] = {
RTW89_RS_CCK,
RTW89_RS_OFDM,
@@ -2064,7 +2065,7 @@ void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev,
BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4);
addr = R_AX_PWR_BY_RATE;
- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) {
+ for (cur.nss = 0; cur.nss < max_nss_num; cur.nss++) {
for (i = 0; i < ARRAY_SIZE(rs); i++) {
if (cur.nss >= rtw89_rs_nss_max[rs[i]])
continue;
@@ -2127,6 +2128,7 @@ void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{
+ u8 max_ntx_num = rtwdev->chip->rf_path_num;
struct rtw89_txpwr_limit lmt;
u8 ch = chan->channel;
u8 bw = chan->band_width;
@@ -2141,7 +2143,7 @@ void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev,
RTW89_TXPWR_LMT_PAGE_SIZE);
addr = R_AX_PWR_LMT;
- for (i = 0; i < RTW89_NTX_NUM; i++) {
+ for (i = 0; i < max_ntx_num; i++) {
rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt, i);
ptr = (s8 *)&lmt;
@@ -2162,6 +2164,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{
+ u8 max_ntx_num = rtwdev->chip->rf_path_num;
struct rtw89_txpwr_limit_ru lmt_ru;
u8 ch = chan->channel;
u8 bw = chan->band_width;
@@ -2176,7 +2179,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev,
RTW89_TXPWR_LMT_RU_PAGE_SIZE);
addr = R_AX_PWR_RU_LMT;
- for (i = 0; i < RTW89_NTX_NUM; i++) {
+ for (i = 0; i < max_ntx_num; i++) {
rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru, i);
ptr = (s8 *)&lmt_ru;