diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-03-19 17:13:14 +0900 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-03-27 15:14:43 +0200 |
| commit | 4fc97ef94bbfa185d16b3e44199b7559d0668747 (patch) | |
| tree | 922222a02148ea3b42cfd0e51e66c701ec670dca /drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | |
| parent | c8a830904991931106c96ff1ee0588d1ca9ea5f0 (diff) | |
| download | linux-4fc97ef94bbfa185d16b3e44199b7559d0668747.tar.gz | |
pinctrl: uniphier: add UART hardware flow control pin-mux settings
UniPhier SoCs have the following pins for hardware flow control of UART:
XRTS, XCTS
and for modem control of UART:
XDTR, XDSR, XDCD, XRI
The port number with the flow control is SoC-dependent.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c')
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index f0a4cfc00160..032619ad0e73 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -788,6 +788,8 @@ static const unsigned uart0_pins[] = {217, 218}; static const int uart0_muxvals[] = {8, 8}; static const unsigned uart0b_pins[] = {179, 180}; static const int uart0b_muxvals[] = {10, 10}; +static const unsigned uart0b_ctsrts_pins[] = {176, 177, 178, 183, 184, 185}; +static const int uart0b_ctsrts_muxvals[] = {10, 10, 10, 10, 10, 10}; static const unsigned uart1_pins[] = {115, 116}; static const int uart1_muxvals[] = {8, 8}; static const unsigned uart2_pins[] = {113, 114}; @@ -863,6 +865,7 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { UNIPHIER_PINCTRL_GROUP(system_bus_cs1), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart0b_ctsrts), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart2), UNIPHIER_PINCTRL_GROUP(uart3), @@ -896,7 +899,7 @@ static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; static const char * const system_bus_groups[] = {"system_bus", "system_bus_cs1"}; -static const char * const uart0_groups[] = {"uart0", "uart0b"}; +static const char * const uart0_groups[] = {"uart0", "uart0b", "uart0b_ctsrts"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; static const char * const uart3_groups[] = {"uart3", "uart3b"}; |