summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--Documentation/sound/alsa-configuration.rst13
-rw-r--r--Documentation/sound/kernel-api/writing-an-alsa-driver.rst22
-rw-r--r--sound/core/pcm_lib.c105
-rw-r--r--sound/core/pcm_local.h3
-rw-r--r--sound/core/pcm_native.c6
-rw-r--r--sound/pci/emu10k1/emu10k1_callback.c15
-rw-r--r--sound/pci/emu10k1/emu10k1_main.c46
-rw-r--r--sound/pci/emu10k1/emufx.c6
-rw-r--r--sound/pci/emu10k1/emumixer.c8
-rw-r--r--sound/pci/emu10k1/emupcm.c12
-rw-r--r--sound/pci/emu10k1/io.c18
-rw-r--r--sound/pci/emu10k1/p16v.c29
-rw-r--r--sound/pci/hda/hda_intel.c21
-rw-r--r--sound/pci/hda/patch_hdmi.c22
-rw-r--r--sound/pci/hda/patch_realtek.c5
-rw-r--r--sound/soc/amd/yc/acp6x-mach.c14
-rw-r--r--sound/soc/codecs/Kconfig2
-rw-r--r--sound/soc/codecs/wcd938x-sdw.c1037
-rw-r--r--sound/soc/codecs/wcd938x.c1003
-rw-r--r--sound/soc/codecs/wcd938x.h1
-rw-r--r--sound/soc/intel/common/soc-acpi-intel-byt-match.c2
-rw-r--r--sound/soc/intel/common/soc-acpi-intel-cht-match.c26
-rw-r--r--sound/usb/caiaq/input.c1
-rw-r--r--sound/usb/quirks-table.h58
24 files changed, 1349 insertions, 1126 deletions
diff --git a/Documentation/sound/alsa-configuration.rst b/Documentation/sound/alsa-configuration.rst
index af71c68f1e4e..829c672d9fe6 100644
--- a/Documentation/sound/alsa-configuration.rst
+++ b/Documentation/sound/alsa-configuration.rst
@@ -133,6 +133,19 @@ enable
enable card;
Default: enabled, for PCI and ISA PnP cards
+These options are used for either specifying the order of instances or
+controlling enabling and disabling of each one of the devices if there
+are multiple devices bound with the same driver. For example, there are
+many machines which have two HD-audio controllers (one for HDMI/DP
+audio and another for onboard analog). In most cases, the second one is
+in primary usage, and people would like to assign it as the first
+appearing card. They can do it by specifying "index=1,0" module
+parameter, which will swap the assignment slots.
+
+Today, with the sound backend like PulseAudio and PipeWire which
+supports dynamic configuration, it's of little use, but that was a
+help for static configuration in the past.
+
Module snd-adlib
----------------
diff --git a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst
index c0f97b5e4249..4335c98b3d82 100644
--- a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst
+++ b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst
@@ -3994,21 +3994,21 @@ Driver with A Single Source File
Suppose you have a file xyz.c. Add the following two lines::
- snd-xyz-objs := xyz.o
- obj-$(CONFIG_SND_XYZ) += snd-xyz.o
+ snd-xyz-objs := xyz.o
+ obj-$(CONFIG_SND_XYZ) += snd-xyz.o
2. Create the Kconfig entry
Add the new entry of Kconfig for your xyz driver::
- config SND_XYZ
- tristate "Foobar XYZ"
- depends on SND
- select SND_PCM
- help
- Say Y here to include support for Foobar XYZ soundcard.
- To compile this driver as a module, choose M here:
- the module will be called snd-xyz.
+ config SND_XYZ
+ tristate "Foobar XYZ"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y here to include support for Foobar XYZ soundcard.
+ To compile this driver as a module, choose M here:
+ the module will be called snd-xyz.
The line ``select SND_PCM`` specifies that the driver xyz supports PCM.
In addition to SND_PCM, the following components are supported for
@@ -4032,7 +4032,7 @@ located in the new subdirectory, sound/pci/xyz.
1. Add a new directory (``sound/pci/xyz``) in ``sound/pci/Makefile``
as below::
- obj-$(CONFIG_SND) += sound/pci/xyz/
+ obj-$(CONFIG_SND) += sound/pci/xyz/
2. Under the directory ``sound/pci/xyz``, create a Makefile::
diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
index d21c73944efd..9c121a921b04 100644
--- a/sound/core/pcm_lib.c
+++ b/sound/core/pcm_lib.c
@@ -33,6 +33,25 @@
static int fill_silence_frames(struct snd_pcm_substream *substream,
snd_pcm_uframes_t off, snd_pcm_uframes_t frames);
+
+static inline void update_silence_vars(struct snd_pcm_runtime *runtime,
+ snd_pcm_uframes_t ptr,
+ snd_pcm_uframes_t new_ptr)
+{
+ snd_pcm_sframes_t delta;
+
+ delta = new_ptr - ptr;
+ if (delta == 0)
+ return;
+ if (delta < 0)
+ delta += runtime->boundary;
+ if ((snd_pcm_uframes_t)delta < runtime->silence_filled)
+ runtime->silence_filled -= delta;
+ else
+ runtime->silence_filled = 0;
+ runtime->silence_start = new_ptr;
+}
+
/*
* fill ring buffer with silence
* runtime->silence_start: starting pointer to silence area
@@ -42,47 +61,67 @@ static int fill_silence_frames(struct snd_pcm_substream *substream,
*
* when runtime->silence_size >= runtime->boundary - fill processed area with silence immediately
*/
-void snd_pcm_playback_silence(struct snd_pcm_substream *substream)
+void snd_pcm_playback_silence(struct snd_pcm_substream *substream, snd_pcm_uframes_t new_hw_ptr)
{
struct snd_pcm_runtime *runtime = substream->runtime;
- snd_pcm_uframes_t appl_ptr = READ_ONCE(runtime->control->appl_ptr);
- snd_pcm_sframes_t added, hw_avail, frames;
- snd_pcm_uframes_t noise_dist, ofs, transfer;
+ snd_pcm_uframes_t frames, ofs, transfer;
int err;
- added = appl_ptr - runtime->silence_start;
- if (added) {
- if (added < 0)
- added += runtime->boundary;
- if (added < runtime->silence_filled)
- runtime->silence_filled -= added;
- else
- runtime->silence_filled = 0;
- runtime->silence_start = appl_ptr;
- }
-
- // This will "legitimately" turn negative on underrun, and will be mangled
- // into a huge number by the boundary crossing handling. The initial state
- // might also be not quite sane. The code below MUST account for these cases.
- hw_avail = appl_ptr - runtime->status->hw_ptr;
- if (hw_avail < 0)
- hw_avail += runtime->boundary;
-
- noise_dist = hw_avail + runtime->silence_filled;
if (runtime->silence_size < runtime->boundary) {
- frames = runtime->silence_threshold - noise_dist;
- if (frames <= 0)
+ snd_pcm_sframes_t noise_dist;
+ snd_pcm_uframes_t appl_ptr = READ_ONCE(runtime->control->appl_ptr);
+ update_silence_vars(runtime, runtime->silence_start, appl_ptr);
+ /* initialization outside pointer updates */
+ if (new_hw_ptr == ULONG_MAX)
+ new_hw_ptr = runtime->status->hw_ptr;
+ /* get hw_avail with the boundary crossing */
+ noise_dist = appl_ptr - new_hw_ptr;
+ if (noise_dist < 0)
+ noise_dist += runtime->boundary;
+ /* total noise distance */
+ noise_dist += runtime->silence_filled;
+ if (noise_dist >= (snd_pcm_sframes_t) runtime->silence_threshold)
return;
+ frames = runtime->silence_threshold - noise_dist;
if (frames > runtime->silence_size)
frames = runtime->silence_size;
} else {
- frames = runtime->buffer_size - noise_dist;
- if (frames <= 0)
- return;
+ /*
+ * This filling mode aims at free-running mode (used for example by dmix),
+ * which doesn't update the application pointer.
+ */
+ snd_pcm_uframes_t hw_ptr = runtime->status->hw_ptr;
+ if (new_hw_ptr == ULONG_MAX) {
+ /*
+ * Initialization, fill the whole unused buffer with silence.
+ *
+ * Usually, this is entered while stopped, before data is queued,
+ * so both pointers are expected to be zero.
+ */
+ snd_pcm_sframes_t avail = runtime->control->appl_ptr - hw_ptr;
+ if (avail < 0)
+ avail += runtime->boundary;
+ /*
+ * In free-running mode, appl_ptr will be zero even while running,
+ * so we end up with a huge number. There is no useful way to
+ * handle this, so we just clear the whole buffer.
+ */
+ runtime->silence_filled = avail > runtime->buffer_size ? 0 : avail;
+ runtime->silence_start = hw_ptr;
+ } else {
+ /* Silence the just played area immediately */
+ update_silence_vars(runtime, hw_ptr, new_hw_ptr);
+ }
+ /*
+ * In this mode, silence_filled actually includes the valid
+ * sample data from the user.
+ */
+ frames = runtime->buffer_size - runtime->silence_filled;
}
-
if (snd_BUG_ON(frames > runtime->buffer_size))
return;
+ if (frames == 0)
+ return;
ofs = (runtime->silence_start + runtime->silence_filled) % runtime->buffer_size;
do {
transfer = ofs + frames > runtime->buffer_size ? runtime->buffer_size - ofs : frames;
@@ -425,6 +464,10 @@ static int snd_pcm_update_hw_ptr0(struct snd_pcm_substream *substream,
return 0;
}
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
+ runtime->silence_size > 0)
+ snd_pcm_playback_silence(substream, new_hw_ptr);
+
if (in_interrupt) {
delta = new_hw_ptr - runtime->hw_ptr_interrupt;
if (delta < 0)
@@ -442,10 +485,6 @@ static int snd_pcm_update_hw_ptr0(struct snd_pcm_substream *substream,
runtime->hw_ptr_wrap += runtime->boundary;
}
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
- runtime->silence_size > 0)
- snd_pcm_playback_silence(substream);
-
update_audio_tstamp(substream, &curr_tstamp, &audio_tstamp);
return snd_pcm_update_state(substream, runtime);
diff --git a/sound/core/pcm_local.h b/sound/core/pcm_local.h
index 42fe3a4e9154..ecb21697ae3a 100644
--- a/sound/core/pcm_local.h
+++ b/sound/core/pcm_local.h
@@ -29,7 +29,8 @@ int snd_pcm_update_state(struct snd_pcm_substream *substream,
struct snd_pcm_runtime *runtime);
int snd_pcm_update_hw_ptr(struct snd_pcm_substream *substream);
-void snd_pcm_playback_silence(struct snd_pcm_substream *substream);
+void snd_pcm_playback_silence(struct snd_pcm_substream *substream,
+ snd_pcm_uframes_t new_hw_ptr);
static inline snd_pcm_uframes_t
snd_pcm_avail(struct snd_pcm_substream *substream)
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 91c87cdb786e..39a65d1415ab 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -958,7 +958,7 @@ static int snd_pcm_sw_params(struct snd_pcm_substream *substream,
if (snd_pcm_running(substream)) {
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
- snd_pcm_playback_silence(substream);
+ snd_pcm_playback_silence(substream, ULONG_MAX);
err = snd_pcm_update_state(substream, runtime);
}
snd_pcm_stream_unlock_irq(substream);
@@ -1455,7 +1455,7 @@ static void snd_pcm_post_start(struct snd_pcm_substream *substream,
__snd_pcm_set_state(runtime, state);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
- snd_pcm_playback_silence(substream);
+ snd_pcm_playback_silence(substream, ULONG_MAX);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MSTART);
}
@@ -1916,7 +1916,7 @@ static void snd_pcm_post_reset(struct snd_pcm_substream *substream,
runtime->control->appl_ptr = runtime->status->hw_ptr;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
- snd_pcm_playback_silence(substream);
+ snd_pcm_playback_silence(substream, ULONG_MAX);
snd_pcm_stream_unlock_irq(substream);
}
diff --git a/sound/pci/emu10k1/emu10k1_callback.c b/sound/pci/emu10k1/emu10k1_callback.c
index c6d152575181..9455df18f7b2 100644
--- a/sound/pci/emu10k1/emu10k1_callback.c
+++ b/sound/pci/emu10k1/emu10k1_callback.c
@@ -120,9 +120,9 @@ release_voice(struct snd_emux_voice *vp)
struct snd_emu10k1 *hw;
hw = vp->hw;
- dcysusv = 0x8000 | (unsigned char)vp->reg.parm.modrelease;
+ dcysusv = (unsigned char)vp->reg.parm.modrelease | DCYSUSM_PHASE1_MASK;
snd_emu10k1_ptr_write(hw, DCYSUSM, vp->ch, dcysusv);
- dcysusv = 0x8000 | (unsigned char)vp->reg.parm.volrelease | DCYSUSV_CHANNELENABLE_MASK;
+ dcysusv = (unsigned char)vp->reg.parm.volrelease | DCYSUSV_PHASE1_MASK | DCYSUSV_CHANNELENABLE_MASK;
snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch, dcysusv);
}
@@ -138,7 +138,8 @@ terminate_voice(struct snd_emux_voice *vp)
if (snd_BUG_ON(!vp))
return;
hw = vp->hw;
- snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch, 0x807f | DCYSUSV_CHANNELENABLE_MASK);
+ snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch,
+ DCYSUSV_PHASE1_MASK | DCYSUSV_DECAYTIME_MASK | DCYSUSV_CHANNELENABLE_MASK);
if (vp->block) {
struct snd_emu10k1_memblk *emem;
emem = (struct snd_emu10k1_memblk *)vp->block;
@@ -347,9 +348,9 @@ start_voice(struct snd_emux_voice *vp)
}
/* channel to be silent and idle */
- snd_emu10k1_ptr_write(hw, DCYSUSV, ch, 0x0000);
- snd_emu10k1_ptr_write(hw, VTFT, ch, 0x0000FFFF);
- snd_emu10k1_ptr_write(hw, CVCF, ch, 0x0000FFFF);
+ snd_emu10k1_ptr_write(hw, DCYSUSV, ch, 0);
+ snd_emu10k1_ptr_write(hw, VTFT, ch, VTFT_FILTERTARGET_MASK);
+ snd_emu10k1_ptr_write(hw, CVCF, ch, CVCF_CURRENTFILTER_MASK);
snd_emu10k1_ptr_write(hw, PTRX, ch, 0);
snd_emu10k1_ptr_write(hw, CPF, ch, 0);
@@ -453,7 +454,7 @@ start_voice(struct snd_emux_voice *vp)
/* reset volume */
temp = (unsigned int)vp->vtarget << 16;
snd_emu10k1_ptr_write(hw, VTFT, ch, temp | vp->ftarget);
- snd_emu10k1_ptr_write(hw, CVCF, ch, temp | 0xff00);
+ snd_emu10k1_ptr_write(hw, CVCF, ch, temp | CVCF_CURRENTFILTER_MASK);
return 0;
}
diff --git a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c
index 3abdaf1b9624..192208c291d6 100644
--- a/sound/pci/emu10k1/emu10k1_main.c
+++ b/sound/pci/emu10k1/emu10k1_main.c
@@ -59,8 +59,8 @@ void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
{
snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
snd_emu10k1_ptr_write(emu, IP, ch, 0);
- snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
- snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
+ snd_emu10k1_ptr_write(emu, VTFT, ch, VTFT_FILTERTARGET_MASK);
+ snd_emu10k1_ptr_write(emu, CVCF, ch, CVCF_CURRENTFILTER_MASK);
snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
snd_emu10k1_ptr_write(emu, CPF, ch, 0);
snd_emu10k1_ptr_write(emu, CCR, ch, 0);
@@ -74,7 +74,7 @@ void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
- snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
+ snd_emu10k1_ptr_write(emu, IFATN, ch, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK);
snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
@@ -90,10 +90,10 @@ void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
/* Audigy extra stuffs */
if (emu->audigy) {
- snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
- snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
- snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
- snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
+ snd_emu10k1_ptr_write(emu, A_CSBA, ch, 0);
+ snd_emu10k1_ptr_write(emu, A_CSDC, ch, 0);
+ snd_emu10k1_ptr_write(emu, A_CSFE, ch, 0);
+ snd_emu10k1_ptr_write(emu, A_CSHG, ch, 0);
snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
@@ -259,7 +259,7 @@ static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
- snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
+ snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */
silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
for (ch = 0; ch < NUM_G; ch++) {
@@ -818,7 +818,7 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
/* FPGA netlist already present so clear it */
/* Return to programming mode */
- snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
+ snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
}
snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
@@ -858,36 +858,36 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
/* Optical -> ADAT I/O */
emu->emu1010.optical_in = 1; /* IN_ADAT */
emu->emu1010.optical_out = 1; /* OUT_ADAT */
- tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
- (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
+ tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
+ (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
/* Set no attenuation on Audio Dock pads. */
- snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
emu->emu1010.adc_pads = 0x00;
+ snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
/* Unmute Audio dock DACs, Headphone source DAC-4. */
- snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
+ snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
/* DAC PADs. */
- snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
- emu->emu1010.dac_pads = 0x0f;
+ emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
+ EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
+ snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
- snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
+ snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
/* MIDI routing */
- snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
- /* Unknown. */
- snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
+ snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
+ snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
/* IRQ Enable: All on */
- /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
+ /* snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x0f); */
/* IRQ Enable: All off */
snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
emu->emu1010.internal_clock = 1; /* 48000 */
/* Default WCLK set to 48kHz. */
- snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
+ snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
/* Word Clock source, Internal 48kHz x1 */
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
/* Audio Dock LEDs. */
- snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
+ snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, EMU_HANA_DOCK_LEDS_2_LOCK | EMU_HANA_DOCK_LEDS_2_48K);
#if 0
/* For 96kHz */
@@ -1014,7 +1014,7 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
snd_emu1010_fpga_link_dst_src_write(emu,
EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
- snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
+ snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
#if 0
snd_emu1010_fpga_link_dst_src_write(emu,
diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c
index db211a6e8a47..3f64ccab0e63 100644
--- a/sound/pci/emu10k1/emufx.c
+++ b/sound/pci/emu10k1/emufx.c
@@ -1355,7 +1355,7 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
gpr += 2;
/* mic capture buffer */
- A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
+ A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), A_C_40000000, A_EXTIN(A_EXTIN_AC97_R));
/* Audigy CD Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
@@ -1438,7 +1438,7 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
/* Stereo Mix Center Playback */
/* Center = sub = Left/2 + Right/2 */
- A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
+ A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), A_C_40000000, A_GPR(stereo_mix+1));
A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
gpr++;
@@ -2478,7 +2478,7 @@ int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
spin_unlock_irq(&emu->emu_lock);
snd_emu10k1_ptr_write(emu, TCB, 0, 0);
- snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
+ snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
if (emu->fx8010.etram_pages.area != NULL) {
snd_dma_free_pages(&emu->fx8010.etram_pages);
emu->fx8010.etram_pages.area = NULL;
diff --git a/sound/pci/emu10k1/emumixer.c b/sound/pci/emu10k1/emumixer.c
index 8fce3413f4ae..3ebc7c36a444 100644
--- a/sound/pci/emu10k1/emumixer.c
+++ b/sound/pci/emu10k1/emumixer.c
@@ -827,8 +827,8 @@ static int snd_emu1010_optical_out_put(struct snd_kcontrol *kcontrol,
change = (emu->emu1010.optical_out != val);
if (change) {
emu->emu1010.optical_out = val;
- tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
- (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
+ tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
+ (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
}
return change;
@@ -878,8 +878,8 @@ static int snd_emu1010_optical_in_put(struct snd_kcontrol *kcontrol,
change = (emu->emu1010.optical_in != val);
if (change) {
emu->emu1010.optical_in = val;
- tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
- (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
+ tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
+ (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
}
return change;
diff --git a/sound/pci/emu10k1/emupcm.c b/sound/pci/emu10k1/emupcm.c
index b0c0ef342756..e8d2f0f6fbb3 100644
--- a/sound/pci/emu10k1/emupcm.c
+++ b/sound/pci/emu10k1/emupcm.c
@@ -352,8 +352,8 @@ static void snd_emu10k1_pcm_init_voice(struct snd_emu10k1 *emu,
snd_emu10k1_ptr_write(emu, MAPA, voice, silent_page);
snd_emu10k1_ptr_write(emu, MAPB, voice, silent_page);
/* modulation envelope */
- snd_emu10k1_ptr_write(emu, CVCF, voice, 0xffff);
- snd_emu10k1_ptr_write(emu, VTFT, voice, 0xffff);
+ snd_emu10k1_ptr_write(emu, VTFT, voice, VTFT_FILTERTARGET_MASK);
+ snd_emu10k1_ptr_write(emu, CVCF, voice, CVCF_CURRENTFILTER_MASK);
snd_emu10k1_ptr_write(emu, ATKHLDM, voice, 0);
snd_emu10k1_ptr_write(emu, DCYSUSM, voice, 0x007f);
snd_emu10k1_ptr_write(emu, LFOVAL1, voice, 0x8000);
@@ -621,8 +621,8 @@ static void snd_emu10k1_playback_prepare_voice(struct snd_emu10k1 *emu, struct s
tmp = runtime->channels == 2 ? (master ? 1 : 2) : 0;
vattn = mix != NULL ? (mix->attn[tmp] << 16) : 0;
snd_emu10k1_ptr_write(emu, IFATN, voice, attn);
- snd_emu10k1_ptr_write(emu, VTFT, voice, vattn | 0xffff);
- snd_emu10k1_ptr_write(emu, CVCF, voice, vattn | 0xffff);
+ snd_emu10k1_ptr_write(emu, VTFT, voice, vattn | VTFT_FILTERTARGET_MASK);
+ snd_emu10k1_ptr_write(emu, CVCF, voice, vattn | CVCF_CURRENTFILTER_MASK);
snd_emu10k1_ptr_write(emu, DCYSUSV, voice, 0x7f7f);
snd_emu10k1_voice_clear_loop_stop(emu, voice);
}
@@ -663,8 +663,8 @@ static void snd_emu10k1_playback_stop_voice(struct snd_emu10k1 *emu, struct snd_
snd_emu10k1_ptr_write(emu, PTRX_PITCHTARGET, voice, 0);
snd_emu10k1_ptr_write(emu, CPF_CURRENTPITCH, voice, 0);
snd_emu10k1_ptr_write(emu, IFATN, voice, 0xffff);
- snd_emu10k1_ptr_write(emu, VTFT, voice, 0xffff);
- snd_emu10k1_ptr_write(emu, CVCF, voice, 0xffff);
+ snd_emu10k1_ptr_write(emu, VTFT, voice, VTFT_FILTERTARGET_MASK);
+ snd_emu10k1_ptr_write(emu, CVCF, voice, CVCF_CURRENTFILTER_MASK);
snd_emu10k1_ptr_write(emu, IP, voice, 0);
}
diff --git a/sound/pci/emu10k1/io.c b/sound/pci/emu10k1/io.c
index c60573f14ea8..cfb96a67aa35 100644
--- a/sound/pci/emu10k1/io.c
+++ b/sound/pci/emu10k1/io.c
@@ -95,8 +95,8 @@ unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
- outl(regptr, emu->port + 0x20 + PTR);
- val = inl(emu->port + 0x20 + DATA);
+ outl(regptr, emu->port + PTR2);
+ val = inl(emu->port + DATA2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
@@ -112,8 +112,8 @@ void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
- outl(regptr, emu->port + 0x20 + PTR);
- outl(data, emu->port + 0x20 + DATA);
+ outl(regptr, emu->port + PTR2);
+ outl(data, emu->port + DATA2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
@@ -128,7 +128,7 @@ int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
/* This function is not re-entrant, so protect against it. */
spin_lock(&emu->spi_lock);
if (emu->card_capabilities->ca0108_chip)
- reg = 0x3c; /* PTR20, reg 0x3c */
+ reg = P17V_SPI;
else {
/* For other chip types the SPI register
* is currently unknown. */
@@ -280,10 +280,10 @@ void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 s
return;
if (snd_BUG_ON(src & ~0x71f))
return;
- snd_emu1010_fpga_write(emu, 0x00, dst >> 8);
- snd_emu1010_fpga_write(emu, 0x01, dst & 0x1f);
- snd_emu1010_fpga_write(emu, 0x02, src >> 8);
- snd_emu1010_fpga_write(emu, 0x03, src & 0x1f);
+ snd_emu1010_fpga_write(emu, EMU_HANA_DESTHI, dst >> 8);
+ snd_emu1010_fpga_write(emu, EMU_HANA_DESTLO, dst & 0x1f);
+ snd_emu1010_fpga_write(emu, EMU_HANA_SRCHI, src >> 8);
+ snd_emu1010_fpga_write(emu, EMU_HANA_SRCLO, src & 0x1f);
}
void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
diff --git a/sound/pci/emu10k1/p16v.c b/sound/pci/emu10k1/p16v.c
index ce4d3450959c..e7f097cae574 100644
--- a/sound/pci/emu10k1/p16v.c
+++ b/sound/pci/emu10k1/p16v.c
@@ -254,19 +254,24 @@ static int snd_p16v_pcm_prepare_playback(struct snd_pcm_substream *substream)
emu->p16v_buffer->bytes);
#endif /* debug */
tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel);
+ tmp &= ~(A_SPDIF_RATE_MASK | A_EHC_SRC48_MASK);
switch (runtime->rate) {
case 44100:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x8080);
+ snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
+ tmp | A_SPDIF_44100 | A_EHC_SRC48_44);
break;
case 96000:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x4040);
+ snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
+ tmp | A_SPDIF_96000 | A_EHC_SRC48_96);
break;
case 192000:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x2020);
+ snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
+ tmp | A_SPDIF_192000 | A_EHC_SRC48_192);
break;
case 48000:
default:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x0000);
+ snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
+ tmp | A_SPDIF_48000 | A_EHC_SRC48_BYPASS);
break;
}
/* FIXME: Check emu->buffer.size before actually writing to it. */
@@ -282,8 +287,8 @@ static int snd_p16v_pcm_prepare_playback(struct snd_pcm_substream *substream)
//snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, PLAYBACK_POINTER, channel, 0);
- snd_emu10k1_ptr20_write(emu, 0x07, channel, 0x0);
- snd_emu10k1_ptr20_write(emu, 0x08, channel, 0);
+ snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_END_ADDRESS, channel, 0);
+ snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_POINTER, channel, 0);
return 0;
}
@@ -294,7 +299,6 @@ static int snd_p16v_pcm_prepare_capture(struct snd_pcm_substream *substream)
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int channel = substream->pcm->device - emu->p16v_device_offset;
- u32 tmp;
/*
dev_dbg(emu->card->dev, "prepare capture:channel_number=%d, rate=%d, "
@@ -304,24 +308,23 @@ static int snd_p16v_pcm_prepare_capture(struct snd_pcm_substream *substream)
runtime->buffer_size, runtime->period_size,
frames_to_bytes(runtime, 1));
*/
- tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel);
switch (runtime->rate) {
case 44100:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0800);
+ snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_44100);
break;
case 96000:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0400);
+ snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_96000);
break;
case 192000:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0200);
+ snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_192000);
break;
case 48000:
default:
- snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0000);
+ snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_48000);
break;
}
/* FIXME: Check emu->buffer.size before actually writing to it. */
- snd_emu10k1_ptr20_write(emu, 0x13, channel, 0);
+ snd_emu10k1_ptr20_write(emu, CAPTURE_FIFO_POINTER, channel, 0);
snd_emu10k1_ptr20_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
snd_emu10k1_ptr20_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size) << 16); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, CAPTURE_POINTER, channel, 0);
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 881b2f3a1551..3226691ac923 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -227,6 +227,7 @@ enum {
AZX_DRIVER_ATI,
AZX_DRIVER_ATIHDMI,
AZX_DRIVER_ATIHDMI_NS,
+ AZX_DRIVER_GFHDMI,
AZX_DRIVER_VIA,
AZX_DRIVER_SIS,
AZX_DRIVER_ULI,
@@ -349,6 +350,7 @@ static const char * const driver_short_names[] = {
[AZX_DRIVER_ATI] = "HDA ATI SB",
[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
+ [AZX_DRIVER_GFHDMI] = "HDA GF HDMI",
[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
[AZX_DRIVER_SIS] = "HDA SIS966",
[AZX_DRIVER_ULI] = "HDA ULI M5461",
@@ -1743,6 +1745,12 @@ static int default_bdl_pos_adj(struct azx *chip)
}
switch (chip->driver_type) {
+ /*
+ * increase the bdl size for Glenfly Gpus for hardware
+ * limitation on hdac interrupt interval
+ */
+ case AZX_DRIVER_GFHDMI:
+ return 128;
case AZX_DRIVER_ICH:
case AZX_DRIVER_PCH:
return 1;
@@ -1858,6 +1866,12 @@ static int azx_first_init(struct azx *chip)
pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
}
#endif
+ /*
+ * Fix response write request not synced to memory when handle
+ * hdac interrupt on Glenfly Gpus
+ */
+ if (chip->driver_type == AZX_DRIVER_GFHDMI)
+ bus->polling_mode = 1;
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
if (err < 0)
@@ -1959,6 +1973,7 @@ static int azx_first_init(struct azx *chip)
chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
chip->capture_streams = ATIHDMI_NUM_CAPTURE;
break;
+ case AZX_DRIVER_GFHDMI:
case AZX_DRIVER_GENERIC:
default:
chip->playback_streams = ICH6_NUM_PLAYBACK;
@@ -2727,6 +2742,12 @@ static const struct pci_device_id azx_ids[] = {
{ PCI_DEVICE(0x1002, 0xab38),
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
AZX_DCAPS_PM_RUNTIME },
+ /* GLENFLY */
+ { PCI_DEVICE(0x6766, PCI_ANY_ID),
+ .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
+ .class_mask = 0xffffff,
+ .driver_data = AZX_DRIVER_GFHDMI | AZX_DCAPS_POSFIX_LPIB |
+ AZX_DCAPS_NO_MSI | AZX_DCAPS_NO_64BIT },
/* VIA VT8251/VT8237A */
{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
/* VIA GFX VT7122/VX900 */
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index ee051bdfaff6..64a944016c78 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -4485,6 +4485,22 @@ static int patch_via_hdmi(struct hda_codec *codec)
return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
}
+static int patch_gf_hdmi(struct hda_codec *codec)
+{
+ int err;
+
+ err = patch_generic_hdmi(codec);
+ if (err)
+ return err;
+
+ /*
+ * Glenfly GPUs have two codecs, stream switches from one codec to
+ * another, need to do actual clean-ups in codec_cleanup_stream
+ */
+ codec->no_sticky_stream = 1;
+ return 0;
+}
+
/*
* patch entries
*/
@@ -4575,6 +4591,12 @@ HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch),
+HDA_CODEC_ENTRY(0x67663d82, "Arise 82 HDMI/DP", patch_gf_hdmi),
+HDA_CODEC_ENTRY(0x67663d83, "Arise 83 HDMI/DP", patch_gf_hdmi),
+HDA_CODEC_ENTRY(0x67663d84, "Arise 84 HDMI/DP", patch_gf_hdmi),
+HDA_CODEC_ENTRY(0x67663d85, "Arise 85 HDMI/DP", patch_gf_hdmi),
+HDA_CODEC_ENTRY(0x67663d86, "Arise 86 HDMI/DP", patch_gf_hdmi),
+HDA_CODEC_ENTRY(0x67663d87, "Arise 87 HDMI/DP", patch_gf_hdmi),
HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index f70d6a33421d..172ffc2c332b 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -9428,6 +9428,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x8898, "HP EliteBook 845 G8 Notebook PC", ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x103c, 0x88d0, "HP Pavilion 15-eh1xxx (mainboard 88D0)", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8902, "HP OMEN 16", ALC285_FIXUP_HP_MUTE_LED),
+ SND_PCI_QUIRK(0x103c, 0x8919, "HP Pavilion Aero Laptop 13-be0xxx", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x896d, "HP ZBook Firefly 16 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x896e, "HP EliteBook x360 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8971, "HP EliteBook 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
@@ -9478,6 +9479,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x8b8d, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b8f, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b92, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
+ SND_PCI_QUIRK(0x103c, 0x8b96, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8bf0, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
@@ -9500,6 +9502,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x1043, 0x1427, "Asus Zenbook UX31E", ALC269VB_FIXUP_ASUS_ZENBOOK),
SND_PCI_QUIRK(0x1043, 0x1517, "Asus Zenbook UX31A", ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A),
SND_PCI_QUIRK(0x1043, 0x1662, "ASUS GV301QH", ALC294_FIXUP_ASUS_DUAL_SPK),
+ SND_PCI_QUIRK(0x1043, 0x1683, "ASUS UM3402YAR", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x1043, 0x16b2, "ASUS GU603", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x1740, "ASUS UX430UA", ALC295_FIXUP_ASUS_DACS),
@@ -9689,6 +9692,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x17aa, 0x22f1, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x17aa, 0x22f2, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x17aa, 0x22f3, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2),
+ SND_PCI_QUIRK(0x17aa, 0x2316, "Thinkpad P1 Gen 6", ALC287_FIXUP_CS35L41_I2C_2),
+ SND_PCI_QUIRK(0x17aa, 0x2317, "Thinkpad P1 Gen 6", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x17aa, 0x2318, "Thinkpad Z13 Gen2", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x17aa, 0x2319, "Thinkpad Z16 Gen2", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x17aa, 0x231a, "Thinkpad Z16 Gen2", ALC287_FIXUP_CS35L41_I2C_2),
diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c
index b9958e555367..0bc6e4066d0f 100644
--- a/sound/soc/amd/yc/acp6x-mach.c
+++ b/sound/soc/amd/yc/acp6x-mach.c
@@ -230,6 +230,20 @@ static const struct dmi_system_id yc_acp_quirk_table[] = {
{
.driver_data = &acp6x_card,
.matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC."),
+ DMI_MATCH(DMI_PRODUCT_NAME, "M6400RC"),
+ }
+ },
+ {
+ .driver_data = &acp6x_card,
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC."),
+ DMI_MATCH(DMI_PRODUCT_NAME, "M3402RA"),
+ }
+ },
+ {
+ .driver_data = &acp6x_card,
+ .matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "Alienware"),
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m17 R5 AMD"),
}
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 79d2362ad055..8020097d4e4c 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -1090,7 +1090,7 @@ config SND_SOC_MAX98088
depends on I2C
config SND_SOC_MAX98090
- tristate
+ tristate "Maxim MAX98090 CODEC"
depends on I2C
config SND_SOC_MAX98095
diff --git a/sound/soc/codecs/wcd938x-sdw.c b/sound/soc/codecs/wcd938x-sdw.c
index 33d1b5ffeaeb..402286dfaea4 100644
--- a/sound/soc/codecs/wcd938x-sdw.c
+++ b/sound/soc/codecs/wcd938x-sdw.c
@@ -161,6 +161,14 @@ EXPORT_SYMBOL_GPL(wcd938x_sdw_set_sdw_stream);
static int wcd9380_update_status(struct sdw_slave *slave,
enum sdw_slave_status status)
{
+ struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
+
+ if (wcd->regmap && (status == SDW_SLAVE_ATTACHED)) {
+ /* Write out any cached changes that happened between probe and attach */
+ regcache_cache_only(wcd->regmap, false);
+ return regcache_sync(wcd->regmap);
+ }
+
return 0;
}
@@ -177,20 +185,1014 @@ static int wcd9380_interrupt_callback(struct sdw_slave *slave,
{
struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
struct irq_domain *slave_irq = wcd->slave_irq;
- struct regmap *regmap = dev_get_regmap(&slave->dev, NULL);
u32 sts1, sts2, sts3;
do {
handle_nested_irq(irq_find_mapping(slave_irq, 0));
- regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_0, &sts1);
- regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_1, &sts2);
- regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_2, &sts3);
+ regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_0, &sts1);
+ regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_1, &sts2);
+ regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_2, &sts3);
} while (sts1 || sts2 || sts3);
return IRQ_HANDLED;
}
+static const struct reg_default wcd938x_defaults[] = {
+ {WCD938X_ANA_PAGE_REGISTER, 0x00},
+ {WCD938X_ANA_BIAS, 0x00},
+ {WCD938X_ANA_RX_SUPPLIES, 0x00},
+ {WCD938X_ANA_HPH, 0x0C},
+ {WCD938X_ANA_EAR, 0x00},
+ {WCD938X_ANA_EAR_COMPANDER_CTL, 0x02},
+ {WCD938X_ANA_TX_CH1, 0x20},
+ {WCD938X_ANA_TX_CH2, 0x00},
+ {WCD938X_ANA_TX_CH3, 0x20},
+ {WCD938X_ANA_TX_CH4, 0x00},
+ {WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC, 0x00},
+ {WCD938X_ANA_MICB3_DSP_EN_LOGIC, 0x00},
+ {WCD938X_ANA_MBHC_MECH, 0x39},
+ {WCD938X_ANA_MBHC_ELECT, 0x08},
+ {WCD938X_ANA_MBHC_ZDET, 0x00},
+ {WCD938X_ANA_MBHC_RESULT_1, 0x00},
+ {WCD938X_ANA_MBHC_RESULT_2, 0x00},
+ {WCD938X_ANA_MBHC_RESULT_3, 0x00},
+ {WCD938X_ANA_MBHC_BTN0, 0x00},
+ {WCD938X_ANA_MBHC_BTN1, 0x10},
+ {WCD938X_ANA_MBHC_BTN2, 0x20},
+ {WCD938X_ANA_MBHC_BTN3, 0x30},
+ {WCD938X_ANA_MBHC_BTN4, 0x40},
+ {WCD938X_ANA_MBHC_BTN5, 0x50},
+ {WCD938X_ANA_MBHC_BTN6, 0x60},
+ {WCD938X_ANA_MBHC_BTN7, 0x70},
+ {WCD938X_ANA_MICB1, 0x10},
+ {WCD938X_ANA_MICB2, 0x10},
+ {WCD938X_ANA_MICB2_RAMP, 0x00},
+ {WCD938X_ANA_MICB3, 0x10},
+ {WCD938X_ANA_MICB4, 0x10},
+ {WCD938X_BIAS_CTL, 0x2A},
+ {WCD938X_BIAS_VBG_FINE_ADJ, 0x55},
+ {WCD938X_LDOL_VDDCX_ADJUST, 0x01},
+ {WCD938X_LDOL_DISABLE_LDOL, 0x00},
+ {WCD938X_MBHC_CTL_CLK, 0x00},
+ {WCD938X_MBHC_CTL_ANA, 0x00},
+ {WCD938X_MBHC_CTL_SPARE_1, 0x00},
+ {WCD938X_MBHC_CTL_SPARE_2, 0x00},
+ {WCD938X_MBHC_CTL_BCS, 0x00},
+ {WCD938X_MBHC_MOISTURE_DET_FSM_STATUS, 0x00},
+ {WCD938X_MBHC_TEST_CTL, 0x00},
+ {WCD938X_LDOH_MODE, 0x2B},
+ {WCD938X_LDOH_BIAS, 0x68},
+ {WCD938X_LDOH_STB_LOADS, 0x00},
+ {WCD938X_LDOH_SLOWRAMP, 0x50},
+ {WCD938X_MICB1_TEST_CTL_1, 0x1A},
+ {WCD938X_MICB1_TEST_CTL_2, 0x00},
+ {WCD938X_MICB1_TEST_CTL_3, 0xA4},
+ {WCD938X_MICB2_TEST_CTL_1, 0x1A},
+ {WCD938X_MICB2_TEST_CTL_2, 0x00},
+ {WCD938X_MICB2_TEST_CTL_3, 0x24},
+ {WCD938X_MICB3_TEST_CTL_1, 0x1A},
+ {WCD938X_MICB3_TEST_CTL_2, 0x00},
+ {WCD938X_MICB3_TEST_CTL_3, 0xA4},
+ {WCD938X_MICB4_TEST_CTL_1, 0x1A},
+ {WCD938X_MICB4_TEST_CTL_2, 0x00},
+ {WCD938X_MICB4_TEST_CTL_3, 0xA4},
+ {WCD938X_TX_COM_ADC_VCM, 0x39},
+ {WCD938X_TX_COM_BIAS_ATEST, 0xE0},
+ {WCD938X_TX_COM_SPARE1, 0x00},
+ {WCD938X_TX_COM_SPARE2, 0x00},
+ {WCD938X_TX_COM_TXFE_DIV_CTL, 0x22},
+ {WCD938X_TX_COM_TXFE_DIV_START, 0x00},
+ {WCD938X_TX_COM_SPARE3, 0x00},
+ {WCD938X_TX_COM_SPARE4, 0x00},
+ {WCD938X_TX_1_2_TEST_EN, 0xCC},
+ {WCD938X_TX_1_2_ADC_IB, 0xE9},
+ {WCD938X_TX_1_2_ATEST_REFCTL, 0x0A},
+ {WCD938X_TX_1_2_TEST_CTL, 0x38},
+ {WCD938X_TX_1_2_TEST_BLK_EN1, 0xFF},
+ {WCD938X_TX_1_2_TXFE1_CLKDIV, 0x00},
+ {WCD938X_TX_1_2_SAR2_ERR, 0x00},
+ {WCD938X_TX_1_2_SAR1_ERR, 0x00},
+ {WCD938X_TX_3_4_TEST_EN, 0xCC},
+ {WCD938X_TX_3_4_ADC_IB, 0xE9},
+ {WCD938X_TX_3_4_ATEST_REFCTL, 0x0A},
+ {WCD938X_TX_3_4_TEST_CTL, 0x38},
+ {WCD938X_TX_3_4_TEST_BLK_EN3, 0xFF},
+ {WCD938X_TX_3_4_TXFE3_CLKDIV, 0x00},
+ {WCD938X_TX_3_4_SAR4_ERR, 0x00},
+ {WCD938X_TX_3_4_SAR3_ERR, 0x00},
+ {WCD938X_TX_3_4_TEST_BLK_EN2, 0xFB},
+ {WCD938X_TX_3_4_TXFE2_CLKDIV, 0x00},
+ {WCD938X_TX_3_4_SPARE1, 0x00},
+ {WCD938X_TX_3_4_TEST_BLK_EN4, 0xFB},
+ {WCD938X_TX_3_4_TXFE4_CLKDIV, 0x00},
+ {WCD938X_TX_3_4_SPARE2, 0x00},
+ {WCD938X_CLASSH_MODE_1, 0x40},
+ {WCD938X_CLASSH_MODE_2, 0x3A},
+ {WCD938X_CLASSH_MODE_3, 0x00},
+ {WCD938X_CLASSH_CTRL_VCL_1, 0x70},
+ {WCD938X_CLASSH_CTRL_VCL_2, 0x82},
+ {WCD938X_CLASSH_CTRL_CCL_1, 0x31},
+ {WCD938X_CLASSH_CTRL_CCL_2, 0x80},
+ {WCD938X_CLASSH_CTRL_CCL_3, 0x80},
+ {WCD938X_CLASSH_CTRL_CCL_4, 0x51},
+ {WCD938X_CLASSH_CTRL_CCL_5, 0x00},
+ {WCD938X_CLASSH_BUCK_TMUX_A_D, 0x00},
+ {WCD938X_CLASSH_BUCK_SW_DRV_CNTL, 0x77},
+ {WCD938X_CLASSH_SPARE, 0x00},
+ {WCD938X_FLYBACK_EN, 0x4E},
+ {WCD938X_FLYBACK_VNEG_CTRL_1, 0x0B},
+ {WCD938X_FLYBACK_VNEG_CTRL_2, 0x45},
+ {WCD938X_FLYBACK_VNEG_CTRL_3, 0x74},
+ {WCD938X_FLYBACK_VNEG_CTRL_4, 0x7F},
+ {WCD938X_FLYBACK_VNEG_CTRL_5, 0x83},
+ {WCD938X_FLYBACK_VNEG_CTRL_6, 0x98},
+ {WCD938X_FLYBACK_VNEG_CTRL_7, 0xA9},
+ {WCD938X_FLYBACK_VNEG_CTRL_8, 0x68},
+ {WCD938X_FLYBACK_VNEG_CTRL_9, 0x64},
+ {WCD938X_FLYBACK_VNEGDAC_CTRL_1, 0xED},
+ {WCD938X_FLYBACK_VNEGDAC_CTRL_2, 0xF0},
+ {WCD938X_FLYBACK_VNEGDAC_CTRL_3, 0xA6},
+ {WCD938X_FLYBACK_CTRL_1, 0x65},
+ {WCD938X_FLYBACK_TEST_CTL, 0x00},
+ {WCD938X_RX_AUX_SW_CTL, 0x00},
+ {WCD938X_RX_PA_AUX_IN_CONN, 0x01},
+ {WCD938X_RX_TIMER_DIV, 0x32},
+ {WCD938X_RX_OCP_CTL, 0x1F},
+ {WCD938X_RX_OCP_COUNT, 0x77},
+ {WCD938X_RX_BIAS_EAR_DAC, 0xA0},
+ {WCD938X_RX_BIAS_EAR_AMP, 0xAA},
+ {WCD938X_RX_BIAS_HPH_LDO, 0xA9},
+ {WCD938X_RX_BIAS_HPH_PA, 0xAA},
+ {WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2, 0x8A},
+ {WCD938X_RX_BIAS_HPH_RDAC_LDO, 0x88},
+ {WCD938X_RX_BIAS_HPH_CNP1, 0x82},
+ {WCD938X_RX_BIAS_HPH_LOWPOWER, 0x82},
+ {WCD938X_RX_BIAS_AUX_DAC, 0xA0},
+ {WCD938X_RX_BIAS_AUX_AMP, 0xAA},
+ {WCD938X_RX_BIAS_VNEGDAC_BLEEDER, 0x50},
+ {WCD938X_RX_BIAS_MISC, 0x00},
+ {WCD938X_RX_BIAS_BUCK_RST, 0x08},
+ {WCD938X_RX_BIAS_BUCK_VREF_ERRAMP, 0x44},
+ {WCD938X_RX_BIAS_FLYB_ERRAMP, 0x40},
+ {WCD938X_RX_BIAS_FLYB_BUFF, 0xAA},
+ {WCD938X_RX_BIAS_FLYB_MID_RST, 0x14},
+ {WCD938X_HPH_L_STATUS, 0x04},
+ {WCD938X_HPH_R_STATUS, 0x04},
+ {WCD938X_HPH_CNP_EN, 0x80},
+ {WCD938X_HPH_CNP_WG_CTL, 0x9A},
+ {WCD938X_HPH_CNP_WG_TIME, 0x14},
+ {WCD938X_HPH_OCP_CTL, 0x28},
+ {WCD938X_HPH_AUTO_CHOP, 0x16},
+ {WCD938X_HPH_CHOP_CTL, 0x83},
+ {WCD938X_HPH_PA_CTL1, 0x46},
+ {WCD938X_HPH_PA_CTL2, 0x50},
+ {WCD938X_HPH_L_EN, 0x80},
+ {WCD938X_HPH_L_TEST, 0xE0},
+ {WCD938X_HPH_L_ATEST, 0x50},
+ {WCD938X_HPH_R_EN, 0x80},
+ {WCD938X_HPH_R_TEST, 0xE0},
+ {WCD938X_HPH_R_ATEST, 0x54},
+ {WCD938X_HPH_RDAC_CLK_CTL1, 0x99},
+ {WCD938X_HPH_RDAC_CLK_CTL2, 0x9B},
+ {WCD938X_HPH_RDAC_LDO_CTL, 0x33},
+ {WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL, 0x00},
+ {WCD938X_HPH_REFBUFF_UHQA_CTL, 0x68},
+ {WCD938X_HPH_REFBUFF_LP_CTL, 0x0E},
+ {WCD938X_HPH_L_DAC_CTL, 0x20},
+ {WCD938X_HPH_R_DAC_CTL, 0x20},
+ {WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL, 0x55},
+ {WCD938X_HPH_SURGE_HPHLR_SURGE_EN, 0x19},
+ {WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1, 0xA0},
+ {WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS, 0x00},
+ {WCD938X_EAR_EAR_EN_REG, 0x22},
+ {WCD938X_EAR_EAR_PA_CON, 0x44},
+ {WCD938X_EAR_EAR_SP_CON, 0xDB},
+ {WCD938X_EAR_EAR_DAC_CON, 0x80},
+ {WCD938X_EAR_EAR_CNP_FSM_CON, 0xB2},
+ {WCD938X_EAR_TEST_CTL, 0x00},
+ {WCD938X_EAR_STATUS_REG_1, 0x00},
+ {WCD938X_EAR_STATUS_REG_2, 0x08},
+ {WCD938X_ANA_NEW_PAGE_REGISTER, 0x00},
+ {WCD938X_HPH_NEW_ANA_HPH2, 0x00},
+ {WCD938X_HPH_NEW_ANA_HPH3, 0x00},
+ {WCD938X_SLEEP_CTL, 0x16},
+ {WCD938X_SLEEP_WATCHDOG_CTL, 0x00},
+ {WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL, 0x00},
+ {WCD938X_MBHC_NEW_CTL_1, 0x02},
+ {WCD938X_MBHC_NEW_CTL_2, 0x05},
+ {WCD938X_MBHC_NEW_PLUG_DETECT_CTL, 0xE9},
+ {WCD938X_MBHC_NEW_ZDET_ANA_CTL, 0x0F},
+ {WCD938X_MBHC_NEW_ZDET_RAMP_CTL, 0x00},
+ {WCD938X_MBHC_NEW_FSM_STATUS, 0x00},
+ {WCD938X_MBHC_NEW_ADC_RESULT, 0x00},
+ {WCD938X_TX_NEW_AMIC_MUX_CFG, 0x00},
+ {WCD938X_AUX_AUXPA, 0x00},
+ {WCD938X_LDORXTX_MODE, 0x0C},
+ {WCD938X_LDORXTX_CONFIG, 0x10},
+ {WCD938X_DIE_CRACK_DIE_CRK_DET_EN, 0x00},
+ {WCD938X_DIE_CRACK_DIE_CRK_DET_OUT, 0x00},
+ {WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL, 0x40},
+ {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L, 0x81},
+ {WCD938X_HPH_NEW_INT_RDAC_VREF_CTL, 0x10},
+ {WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL, 0x00},
+ {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0x81},
+ {WCD938X_HPH_NEW_INT_PA_MISC1, 0x22},
+ {WCD938X_HPH_NEW_INT_PA_MISC2, 0x00},
+ {WCD938X_HPH_NEW_INT_PA_RDAC_MISC, 0x00},
+ {WCD938X_HPH_NEW_INT_HPH_TIMER1, 0xFE},
+ {WCD938X_HPH_NEW_INT_HPH_TIMER2, 0x02},
+ {WCD938X_HPH_NEW_INT_HPH_TIMER3, 0x4E},
+ {WCD938X_HPH_NEW_INT_HPH_TIMER4, 0x54},
+ {WCD938X_HPH_NEW_INT_PA_RDAC_MISC2, 0x00},
+ {WCD938X_HPH_NEW_INT_PA_RDAC_MISC3, 0x00},
+ {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW, 0x90},
+ {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW, 0x90},
+ {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI, 0x62},
+ {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP, 0x01},
+ {WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP, 0x11},
+ {WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL, 0x57},
+ {WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL, 0x01},
+ {WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT, 0x00},
+ {WCD938X_MBHC_NEW_INT_SPARE_2, 0x00},
+ {WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON, 0xA8},
+ {WCD938X_EAR_INT_NEW_CNP_VCM_CON1, 0x42},
+ {WCD938X_EAR_INT_NEW_CNP_VCM_CON2, 0x22},
+ {WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS, 0x00},
+ {WCD938X_AUX_INT_EN_REG, 0x00},
+ {WCD938X_AUX_INT_PA_CTRL, 0x06},
+ {WCD938X_AUX_INT_SP_CTRL, 0xD2},
+ {WCD938X_AUX_INT_DAC_CTRL, 0x80},
+ {WCD938X_AUX_INT_CLK_CTRL, 0x50},
+ {WCD938X_AUX_INT_TEST_CTRL, 0x00},
+ {WCD938X_AUX_INT_STATUS_REG, 0x00},
+ {WCD938X_AUX_INT_MISC, 0x00},
+ {WCD938X_LDORXTX_INT_BIAS, 0x6E},
+ {WCD938X_LDORXTX_INT_STB_LOADS_DTEST, 0x50},
+ {WCD938X_LDORXTX_INT_TEST0, 0x1C},
+ {WCD938X_LDORXTX_INT_STARTUP_TIMER, 0xFF},
+ {WCD938X_LDORXTX_INT_TEST1, 0x1F},
+ {WCD938X_LDORXTX_INT_STATUS, 0x00},
+ {WCD938X_SLEEP_INT_WATCHDOG_CTL_1, 0x0A},
+ {WCD938X_SLEEP_INT_WATCHDOG_CTL_2, 0x0A},
+ {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1, 0x02},
+ {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2, 0x60},
+ {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2, 0xFF},
+ {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1, 0x7F},
+ {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0, 0x3F},
+ {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M, 0x1F},
+ {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M, 0x0F},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1, 0xD7},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0, 0xC8},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP, 0xC6},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1, 0xD5},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0, 0xCA},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP, 0x05},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0, 0xA5},
+ {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP, 0x13},
+ {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1, 0x88},
+ {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP, 0x42},
+ {WCD938X_TX_COM_NEW_INT_TXADC_INT_L2, 0xFF},
+ {WCD938X_TX_COM_NEW_INT_TXADC_INT_L1, 0x64},
+ {WCD938X_TX_COM_NEW_INT_TXADC_INT_L0, 0x64},
+ {WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP, 0x77},
+ {WCD938X_DIGITAL_PAGE_REGISTER, 0x00},
+ {WCD938X_DIGITAL_CHIP_ID0, 0x00},
+ {WCD938X_DIGITAL_CHIP_ID1, 0x00},
+ {WCD938X_DIGITAL_CHIP_ID2, 0x0D},
+ {WCD938X_DIGITAL_CHIP_ID3, 0x01},
+ {WCD938X_DIGITAL_SWR_TX_CLK_RATE, 0x00},
+ {WCD938X_DIGITAL_CDC_RST_CTL, 0x03},
+ {WCD938X_DIGITAL_TOP_CLK_CFG, 0x00},
+ {WCD938X_DIGITAL_CDC_ANA_CLK_CTL, 0x00},
+ {WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0xF0},
+ {WCD938X_DIGITAL_SWR_RST_EN, 0x00},
+ {WCD938X_DIGITAL_CDC_PATH_MODE, 0x55},
+ {WCD938X_DIGITAL_CDC_RX_RST, 0x00},
+ {WCD938X_DIGITAL_CDC_RX0_CTL, 0xFC},
+ {WCD938X_DIGITAL_CDC_RX1_CTL, 0xFC},
+ {WCD938X_DIGITAL_CDC_RX2_CTL, 0xFC},
+ {WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0x00},
+ {WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0x00},
+ {WCD938X_DIGITAL_CDC_COMP_CTL_0, 0x00},
+ {WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL, 0x1E},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A1_0, 0x00},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A1_1, 0x01},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A2_0, 0x63},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A2_1, 0x04},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A3_0, 0xAC},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A3_1, 0x04},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A4_0, 0x1A},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A4_1, 0x03},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A5_0, 0xBC},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A5_1, 0x02},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A6_0, 0xC7},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_A7_0, 0xF8},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_C_0, 0x47},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_C_1, 0x43},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_C_2, 0xB1},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_C_3, 0x17},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R1, 0x4D},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R2, 0x29},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R3, 0x34},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R4, 0x59},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R5, 0x66},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R6, 0x87},
+ {WCD938X_DIGITAL_CDC_HPH_DSM_R7, 0x64},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A1_0, 0x00},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A1_1, 0x01},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A2_0, 0x96},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A2_1, 0x09},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A3_0, 0xAB},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A3_1, 0x05},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A4_0, 0x1C},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A4_1, 0x02},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A5_0, 0x17},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A5_1, 0x02},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A6_0, 0xAA},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_A7_0, 0xE3},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_C_0, 0x69},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_C_1, 0x54},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_C_2, 0x02},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_C_3, 0x15},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R1, 0xA4},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R2, 0xB5},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R3, 0x86},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R4, 0x85},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R5, 0xAA},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R6, 0xE2},
+ {WCD938X_DIGITAL_CDC_AUX_DSM_R7, 0x62},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0, 0x55},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1, 0xA9},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0, 0x3D},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1, 0x2E},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2, 0x01},
+ {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0, 0x00},
+ {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1, 0xFC},
+ {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2, 0x01},
+ {WCD938X_DIGITAL_CDC_HPH_GAIN_CTL, 0x00},
+ {WCD938X_DIGITAL_CDC_AUX_GAIN_CTL, 0x00},
+ {WCD938X_DIGITAL_CDC_EAR_PATH_CTL, 0x00},
+ {WCD938X_DIGITAL_CDC_SWR_CLH, 0x00},
+ {WCD938X_DIGITAL_SWR_CLH_BYP, 0x00},
+ {WCD938X_DIGITAL_CDC_TX0_CTL, 0x68},
+ {WCD938X_DIGITAL_CDC_TX1_CTL, 0x68},
+ {WCD938X_DIGITAL_CDC_TX2_CTL, 0x68},
+ {WCD938X_DIGITAL_CDC_TX_RST, 0x00},
+ {WCD938X_DIGITAL_CDC_REQ_CTL, 0x01},
+ {WCD938X_DIGITAL_CDC_RST, 0x00},
+ {WCD938X_DIGITAL_CDC_AMIC_CTL, 0x0F},
+ {WCD938X_DIGITAL_CDC_DMIC_CTL, 0x04},
+ {WCD938X_DIGITAL_CDC_DMIC1_CTL, 0x01},
+ {WCD938X_DIGITAL_CDC_DMIC2_CTL, 0x01},
+ {WCD938X_DIGITAL_CDC_DMIC3_CTL, 0x01},
+ {WCD938X_DIGITAL_CDC_DMIC4_CTL, 0x01},
+ {WCD938X_DIGITAL_EFUSE_PRG_CTL, 0x00},
+ {WCD938X_DIGITAL_EFUSE_CTL, 0x2B},
+ {WCD938X_DIGITAL_CDC_DMIC_RATE_1_2, 0x11},
+ {WCD938X_DIGITAL_CDC_DMIC_RATE_3_4, 0x11},
+ {WCD938X_DIGITAL_PDM_WD_CTL0, 0x00},
+ {WCD938X_DIGITAL_PDM_WD_CTL1, 0x00},
+ {WCD938X_DIGITAL_PDM_WD_CTL2, 0x00},
+ {WCD938X_DIGITAL_INTR_MODE, 0x00},
+ {WCD938X_DIGITAL_INTR_MASK_0, 0xFF},
+ {WCD938X_DIGITAL_INTR_MASK_1, 0xFF},
+ {WCD938X_DIGITAL_INTR_MASK_2, 0x3F},
+ {WCD938X_DIGITAL_INTR_STATUS_0, 0x00},
+ {WCD938X_DIGITAL_INTR_STATUS_1, 0x00},
+ {WCD938X_DIGITAL_INTR_STATUS_2, 0x00},
+ {WCD938X_DIGITAL_INTR_CLEAR_0, 0x00},
+ {WCD938X_DIGITAL_INTR_CLEAR_1, 0x00},
+ {WCD938X_DIGITAL_INTR_CLEAR_2, 0x00},
+ {WCD938X_DIGITAL_INTR_LEVEL_0, 0x00},
+ {WCD938X_DIGITAL_INTR_LEVEL_1, 0x00},
+ {WCD938X_DIGITAL_INTR_LEVEL_2, 0x00},
+ {WCD938X_DIGITAL_INTR_SET_0, 0x00},
+ {WCD938X_DIGITAL_INTR_SET_1, 0x00},
+ {WCD938X_DIGITAL_INTR_SET_2, 0x00},
+ {WCD938X_DIGITAL_INTR_TEST_0, 0x00},
+ {WCD938X_DIGITAL_INTR_TEST_1, 0x00},
+ {WCD938X_DIGITAL_INTR_TEST_2, 0x00},
+ {WCD938X_DIGITAL_TX_MODE_DBG_EN, 0x00},
+ {WCD938X_DIGITAL_TX_MODE_DBG_0_1, 0x00},
+ {WCD938X_DIGITAL_TX_MODE_DBG_2_3, 0x00},
+ {WCD938X_DIGITAL_LB_IN_SEL_CTL, 0x00},
+ {WCD938X_DIGITAL_LOOP_BACK_MODE, 0x00},
+ {WCD938X_DIGITAL_SWR_DAC_TEST, 0x00},
+ {WCD938X_DIGITAL_SWR_HM_TEST_RX_0, 0x40},
+ {WCD938X_DIGITAL_SWR_HM_TEST_TX_0, 0x40},
+ {WCD938X_DIGITAL_SWR_HM_TEST_RX_1, 0x00},
+ {WCD938X_DIGITAL_SWR_HM_TEST_TX_1, 0x00},
+ {WCD938X_DIGITAL_SWR_HM_TEST_TX_2, 0x00},
+ {WCD938X_DIGITAL_SWR_HM_TEST_0, 0x00},
+ {WCD938X_DIGITAL_SWR_HM_TEST_1, 0x00},
+ {WCD938X_DIGITAL_PAD_CTL_SWR_0, 0x8F},
+ {WCD938X_DIGITAL_PAD_CTL_SWR_1, 0x06},
+ {WCD938X_DIGITAL_I2C_CTL, 0x00},
+ {WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE, 0x00},
+ {WCD938X_DIGITAL_EFUSE_TEST_CTL_0, 0x00},
+ {WCD938X_DIGITAL_EFUSE_TEST_CTL_1, 0x00},
+ {WCD938X_DIGITAL_EFUSE_T_DATA_0, 0x00},
+ {WCD938X_DIGITAL_EFUSE_T_DATA_1, 0x00},
+ {WCD938X_DIGITAL_PAD_CTL_PDM_RX0, 0xF1},
+ {WCD938X_DIGITAL_PAD_CTL_PDM_RX1, 0xF1},
+ {WCD938X_DIGITAL_PAD_CTL_PDM_TX0, 0xF1},
+ {WCD938X_DIGITAL_PAD_CTL_PDM_TX1, 0xF1},
+ {WCD938X_DIGITAL_PAD_CTL_PDM_TX2, 0xF1},
+ {WCD938X_DIGITAL_PAD_INP_DIS_0, 0x00},
+ {WCD938X_DIGITAL_PAD_INP_DIS_1, 0x00},
+ {WCD938X_DIGITAL_DRIVE_STRENGTH_0, 0x00},
+ {WCD938X_DIGITAL_DRIVE_STRENGTH_1, 0x00},
+ {WCD938X_DIGITAL_DRIVE_STRENGTH_2, 0x00},
+ {WCD938X_DIGITAL_RX_DATA_EDGE_CTL, 0x1F},
+ {WCD938X_DIGITAL_TX_DATA_EDGE_CTL, 0x80},
+ {WCD938X_DIGITAL_GPIO_MODE, 0x00},
+ {WCD938X_DIGITAL_PIN_CTL_OE, 0x00},
+ {WCD938X_DIGITAL_PIN_CTL_DATA_0, 0x00},
+ {WCD938X_DIGITAL_PIN_CTL_DATA_1, 0x00},
+ {WCD938X_DIGITAL_PIN_STATUS_0, 0x00},
+ {WCD938X_DIGITAL_PIN_STATUS_1, 0x00},
+ {WCD938X_DIGITAL_DIG_DEBUG_CTL, 0x00},
+ {WCD938X_DIGITAL_DIG_DEBUG_EN, 0x00},
+ {WCD938X_DIGITAL_ANA_CSR_DBG_ADD, 0x00},
+ {WCD938X_DIGITAL_ANA_CSR_DBG_CTL, 0x48},
+ {WCD938X_DIGITAL_SSP_DBG, 0x00},
+ {WCD938X_DIGITAL_MODE_STATUS_0, 0x00},
+ {WCD938X_DIGITAL_MODE_STATUS_1, 0x00},
+ {WCD938X_DIGITAL_SPARE_0, 0x00},
+ {WCD938X_DIGITAL_SPARE_1, 0x00},
+ {WCD938X_DIGITAL_SPARE_2, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_0, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_1, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_2, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_3, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_4, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_5, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_6, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_7, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_8, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_9, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_10, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_11, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_12, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_13, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_14, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_15, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_16, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_17, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_18, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_19, 0xFF},
+ {WCD938X_DIGITAL_EFUSE_REG_20, 0x0E},
+ {WCD938X_DIGITAL_EFUSE_REG_21, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_22, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_23, 0xF8},
+ {WCD938X_DIGITAL_EFUSE_REG_24, 0x16},
+ {WCD938X_DIGITAL_EFUSE_REG_25, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_26, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_27, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_28, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_29, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_30, 0x00},
+ {WCD938X_DIGITAL_EFUSE_REG_31, 0x00},
+ {WCD938X_DIGITAL_TX_REQ_FB_CTL_0, 0x88},
+ {WCD938X_DIGITAL_TX_REQ_FB_CTL_1, 0x88},
+ {WCD938X_DIGITAL_TX_REQ_FB_CTL_2, 0x88},
+ {WCD938X_DIGITAL_TX_REQ_FB_CTL_3, 0x88},
+ {WCD938X_DIGITAL_TX_REQ_FB_CTL_4, 0x88},
+ {WCD938X_DIGITAL_DEM_BYPASS_DATA0, 0x55},
+ {WCD938X_DIGITAL_DEM_BYPASS_DATA1, 0x55},
+ {WCD938X_DIGITAL_DEM_BYPASS_DATA2, 0x55},
+ {WCD938X_DIGITAL_DEM_BYPASS_DATA3, 0x01},
+};
+
+static bool wcd938x_rdwr_register(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case WCD938X_ANA_PAGE_REGISTER:
+ case WCD938X_ANA_BIAS:
+ case WCD938X_ANA_RX_SUPPLIES:
+ case WCD938X_ANA_HPH:
+ case WCD938X_ANA_EAR:
+ case WCD938X_ANA_EAR_COMPANDER_CTL:
+ case WCD938X_ANA_TX_CH1:
+ case WCD938X_ANA_TX_CH2:
+ case WCD938X_ANA_TX_CH3:
+ case WCD938X_ANA_TX_CH4:
+ case WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC:
+ case WCD938X_ANA_MICB3_DSP_EN_LOGIC:
+ case WCD938X_ANA_MBHC_MECH:
+ case WCD938X_ANA_MBHC_ELECT:
+ case WCD938X_ANA_MBHC_ZDET:
+ case WCD938X_ANA_MBHC_BTN0:
+ case WCD938X_ANA_MBHC_BTN1:
+ case WCD938X_ANA_MBHC_BTN2:
+ case WCD938X_ANA_MBHC_BTN3:
+ case WCD938X_ANA_MBHC_BTN4:
+ case WCD938X_ANA_MBHC_BTN5:
+ case WCD938X_ANA_MBHC_BTN6:
+ case WCD938X_ANA_MBHC_BTN7:
+ case WCD938X_ANA_MICB1:
+ case WCD938X_ANA_MICB2:
+ case WCD938X_ANA_MICB2_RAMP:
+ case WCD938X_ANA_MICB3:
+ case WCD938X_ANA_MICB4:
+ case WCD938X_BIAS_CTL:
+ case WCD938X_BIAS_VBG_FINE_ADJ:
+ case WCD938X_LDOL_VDDCX_ADJUST:
+ case WCD938X_LDOL_DISABLE_LDOL:
+ case WCD938X_MBHC_CTL_CLK:
+ case WCD938X_MBHC_CTL_ANA:
+ case WCD938X_MBHC_CTL_SPARE_1:
+ case WCD938X_MBHC_CTL_SPARE_2:
+ case WCD938X_MBHC_CTL_BCS:
+ case WCD938X_MBHC_TEST_CTL:
+ case WCD938X_LDOH_MODE:
+ case WCD938X_LDOH_BIAS:
+ case WCD938X_LDOH_STB_LOADS:
+ case WCD938X_LDOH_SLOWRAMP:
+ case WCD938X_MICB1_TEST_CTL_1:
+ case WCD938X_MICB1_TEST_CTL_2:
+ case WCD938X_MICB1_TEST_CTL_3:
+ case WCD938X_MICB2_TEST_CTL_1:
+ case WCD938X_MICB2_TEST_CTL_2:
+ case WCD938X_MICB2_TEST_CTL_3:
+ case WCD938X_MICB3_TEST_CTL_1:
+ case WCD938X_MICB3_TEST_CTL_2:
+ case WCD938X_MICB3_TEST_CTL_3:
+ case WCD938X_MICB4_TEST_CTL_1:
+ case WCD938X_MICB4_TEST_CTL_2:
+ case WCD938X_MICB4_TEST_CTL_3:
+ case WCD938X_TX_COM_ADC_VCM:
+ case WCD938X_TX_COM_BIAS_ATEST:
+ case WCD938X_TX_COM_SPARE1:
+ case WCD938X_TX_COM_SPARE2:
+ case WCD938X_TX_COM_TXFE_DIV_CTL:
+ case WCD938X_TX_COM_TXFE_DIV_START:
+ case WCD938X_TX_COM_SPARE3:
+ case WCD938X_TX_COM_SPARE4:
+ case WCD938X_TX_1_2_TEST_EN:
+ case WCD938X_TX_1_2_ADC_IB:
+ case WCD938X_TX_1_2_ATEST_REFCTL:
+ case WCD938X_TX_1_2_TEST_CTL:
+ case WCD938X_TX_1_2_TEST_BLK_EN1:
+ case WCD938X_TX_1_2_TXFE1_CLKDIV:
+ case WCD938X_TX_3_4_TEST_EN:
+ case WCD938X_TX_3_4_ADC_IB:
+ case WCD938X_TX_3_4_ATEST_REFCTL:
+ case WCD938X_TX_3_4_TEST_CTL:
+ case WCD938X_TX_3_4_TEST_BLK_EN3:
+ case WCD938X_TX_3_4_TXFE3_CLKDIV:
+ case WCD938X_TX_3_4_TEST_BLK_EN2:
+ case WCD938X_TX_3_4_TXFE2_CLKDIV:
+ case WCD938X_TX_3_4_SPARE1:
+ case WCD938X_TX_3_4_TEST_BLK_EN4:
+ case WCD938X_TX_3_4_TXFE4_CLKDIV:
+ case WCD938X_TX_3_4_SPARE2:
+ case WCD938X_CLASSH_MODE_1:
+ case WCD938X_CLASSH_MODE_2:
+ case WCD938X_CLASSH_MODE_3:
+ case WCD938X_CLASSH_CTRL_VCL_1:
+ case WCD938X_CLASSH_CTRL_VCL_2:
+ case WCD938X_CLASSH_CTRL_CCL_1:
+ case WCD938X_CLASSH_CTRL_CCL_2:
+ case WCD938X_CLASSH_CTRL_CCL_3:
+ case WCD938X_CLASSH_CTRL_CCL_4:
+ case WCD938X_CLASSH_CTRL_CCL_5:
+ case WCD938X_CLASSH_BUCK_TMUX_A_D:
+ case WCD938X_CLASSH_BUCK_SW_DRV_CNTL:
+ case WCD938X_CLASSH_SPARE:
+ case WCD938X_FLYBACK_EN:
+ case WCD938X_FLYBACK_VNEG_CTRL_1:
+ case WCD938X_FLYBACK_VNEG_CTRL_2:
+ case WCD938X_FLYBACK_VNEG_CTRL_3:
+ case WCD938X_FLYBACK_VNEG_CTRL_4:
+ case WCD938X_FLYBACK_VNEG_CTRL_5:
+ case WCD938X_FLYBACK_VNEG_CTRL_6:
+ case WCD938X_FLYBACK_VNEG_CTRL_7:
+ case WCD938X_FLYBACK_VNEG_CTRL_8:
+ case WCD938X_FLYBACK_VNEG_CTRL_9:
+ case WCD938X_FLYBACK_VNEGDAC_CTRL_1:
+ case WCD938X_FLYBACK_VNEGDAC_CTRL_2:
+ case WCD938X_FLYBACK_VNEGDAC_CTRL_3:
+ case WCD938X_FLYBACK_CTRL_1:
+ case WCD938X_FLYBACK_TEST_CTL:
+ case WCD938X_RX_AUX_SW_CTL:
+ case WCD938X_RX_PA_AUX_IN_CONN:
+ case WCD938X_RX_TIMER_DIV:
+ case WCD938X_RX_OCP_CTL:
+ case WCD938X_RX_OCP_COUNT:
+ case WCD938X_RX_BIAS_EAR_DAC:
+ case WCD938X_RX_BIAS_EAR_AMP:
+ case WCD938X_RX_BIAS_HPH_LDO:
+ case WCD938X_RX_BIAS_HPH_PA:
+ case WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2:
+ case WCD938X_RX_BIAS_HPH_RDAC_LDO:
+ case WCD938X_RX_BIAS_HPH_CNP1:
+ case WCD938X_RX_BIAS_HPH_LOWPOWER:
+ case WCD938X_RX_BIAS_AUX_DAC:
+ case WCD938X_RX_BIAS_AUX_AMP:
+ case WCD938X_RX_BIAS_VNEGDAC_BLEEDER:
+ case WCD938X_RX_BIAS_MISC:
+ case WCD938X_RX_BIAS_BUCK_RST:
+ case WCD938X_RX_BIAS_BUCK_VREF_ERRAMP:
+ case WCD938X_RX_BIAS_FLYB_ERRAMP:
+ case WCD938X_RX_BIAS_FLYB_BUFF:
+ case WCD938X_RX_BIAS_FLYB_MID_RST:
+ case WCD938X_HPH_CNP_EN:
+ case WCD938X_HPH_CNP_WG_CTL:
+ case WCD938X_HPH_CNP_WG_TIME:
+ case WCD938X_HPH_OCP_CTL:
+ case WCD938X_HPH_AUTO_CHOP:
+ case WCD938X_HPH_CHOP_CTL:
+ case WCD938X_HPH_PA_CTL1:
+ case WCD938X_HPH_PA_CTL2:
+ case WCD938X_HPH_L_EN:
+ case WCD938X_HPH_L_TEST:
+ case WCD938X_HPH_L_ATEST:
+ case WCD938X_HPH_R_EN:
+ case WCD938X_HPH_R_TEST:
+ case WCD938X_HPH_R_ATEST:
+ case WCD938X_HPH_RDAC_CLK_CTL1:
+ case WCD938X_HPH_RDAC_CLK_CTL2:
+ case WCD938X_HPH_RDAC_LDO_CTL:
+ case WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL:
+ case WCD938X_HPH_REFBUFF_UHQA_CTL:
+ case WCD938X_HPH_REFBUFF_LP_CTL:
+ case WCD938X_HPH_L_DAC_CTL:
+ case WCD938X_HPH_R_DAC_CTL:
+ case WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL:
+ case WCD938X_HPH_SURGE_HPHLR_SURGE_EN:
+ case WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1:
+ case WCD938X_EAR_EAR_EN_REG:
+ case WCD938X_EAR_EAR_PA_CON:
+ case WCD938X_EAR_EAR_SP_CON:
+ case WCD938X_EAR_EAR_DAC_CON:
+ case WCD938X_EAR_EAR_CNP_FSM_CON:
+ case WCD938X_EAR_TEST_CTL:
+ case WCD938X_ANA_NEW_PAGE_REGISTER:
+ case WCD938X_HPH_NEW_ANA_HPH2:
+ case WCD938X_HPH_NEW_ANA_HPH3:
+ case WCD938X_SLEEP_CTL:
+ case WCD938X_SLEEP_WATCHDOG_CTL:
+ case WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL:
+ case WCD938X_MBHC_NEW_CTL_1:
+ case WCD938X_MBHC_NEW_CTL_2:
+ case WCD938X_MBHC_NEW_PLUG_DETECT_CTL:
+ case WCD938X_MBHC_NEW_ZDET_ANA_CTL:
+ case WCD938X_MBHC_NEW_ZDET_RAMP_CTL:
+ case WCD938X_TX_NEW_AMIC_MUX_CFG:
+ case WCD938X_AUX_AUXPA:
+ case WCD938X_LDORXTX_MODE:
+ case WCD938X_LDORXTX_CONFIG:
+ case WCD938X_DIE_CRACK_DIE_CRK_DET_EN:
+ case WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL:
+ case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L:
+ case WCD938X_HPH_NEW_INT_RDAC_VREF_CTL:
+ case WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL:
+ case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R:
+ case WCD938X_HPH_NEW_INT_PA_MISC1:
+ case WCD938X_HPH_NEW_INT_PA_MISC2:
+ case WCD938X_HPH_NEW_INT_PA_RDAC_MISC:
+ case WCD938X_HPH_NEW_INT_HPH_TIMER1:
+ case WCD938X_HPH_NEW_INT_HPH_TIMER2:
+ case WCD938X_HPH_NEW_INT_HPH_TIMER3:
+ case WCD938X_HPH_NEW_INT_HPH_TIMER4:
+ case WCD938X_HPH_NEW_INT_PA_RDAC_MISC2:
+ case WCD938X_HPH_NEW_INT_PA_RDAC_MISC3:
+ case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW:
+ case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW:
+ case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI:
+ case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP:
+ case WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP:
+ case WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL:
+ case WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL:
+ case WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT:
+ case WCD938X_MBHC_NEW_INT_SPARE_2:
+ case WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON:
+ case WCD938X_EAR_INT_NEW_CNP_VCM_CON1:
+ case WCD938X_EAR_INT_NEW_CNP_VCM_CON2:
+ case WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS:
+ case WCD938X_AUX_INT_EN_REG:
+ case WCD938X_AUX_INT_PA_CTRL:
+ case WCD938X_AUX_INT_SP_CTRL:
+ case WCD938X_AUX_INT_DAC_CTRL:
+ case WCD938X_AUX_INT_CLK_CTRL:
+ case WCD938X_AUX_INT_TEST_CTRL:
+ case WCD938X_AUX_INT_MISC:
+ case WCD938X_LDORXTX_INT_BIAS:
+ case WCD938X_LDORXTX_INT_STB_LOADS_DTEST:
+ case WCD938X_LDORXTX_INT_TEST0:
+ case WCD938X_LDORXTX_INT_STARTUP_TIMER:
+ case WCD938X_LDORXTX_INT_TEST1:
+ case WCD938X_SLEEP_INT_WATCHDOG_CTL_1:
+ case WCD938X_SLEEP_INT_WATCHDOG_CTL_2:
+ case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1:
+ case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2:
+ case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2:
+ case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1:
+ case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0:
+ case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M:
+ case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0:
+ case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP:
+ case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1:
+ case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP:
+ case WCD938X_TX_COM_NEW_INT_TXADC_INT_L2:
+ case WCD938X_TX_COM_NEW_INT_TXADC_INT_L1:
+ case WCD938X_TX_COM_NEW_INT_TXADC_INT_L0:
+ case WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP:
+ case WCD938X_DIGITAL_PAGE_REGISTER:
+ case WCD938X_DIGITAL_SWR_TX_CLK_RATE:
+ case WCD938X_DIGITAL_CDC_RST_CTL:
+ case WCD938X_DIGITAL_TOP_CLK_CFG:
+ case WCD938X_DIGITAL_CDC_ANA_CLK_CTL:
+ case WCD938X_DIGITAL_CDC_DIG_CLK_CTL:
+ case WCD938X_DIGITAL_SWR_RST_EN:
+ case WCD938X_DIGITAL_CDC_PATH_MODE:
+ case WCD938X_DIGITAL_CDC_RX_RST:
+ case WCD938X_DIGITAL_CDC_RX0_CTL:
+ case WCD938X_DIGITAL_CDC_RX1_CTL:
+ case WCD938X_DIGITAL_CDC_RX2_CTL:
+ case WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1:
+ case WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3:
+ case WCD938X_DIGITAL_CDC_COMP_CTL_0:
+ case WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A1_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A1_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A2_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A2_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A3_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A3_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A4_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A4_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A5_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A5_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A6_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_A7_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_C_0:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_C_1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_C_2:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_C_3:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R1:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R2:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R3:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R4:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R5:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R6:
+ case WCD938X_DIGITAL_CDC_HPH_DSM_R7:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A1_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A1_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A2_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A2_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A3_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A3_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A4_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A4_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A5_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A5_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A6_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_A7_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_C_0:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_C_1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_C_2:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_C_3:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R1:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R2:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R3:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R4:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R5:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R6:
+ case WCD938X_DIGITAL_CDC_AUX_DSM_R7:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2:
+ case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0:
+ case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1:
+ case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2:
+ case WCD938X_DIGITAL_CDC_HPH_GAIN_CTL:
+ case WCD938X_DIGITAL_CDC_AUX_GAIN_CTL:
+ case WCD938X_DIGITAL_CDC_EAR_PATH_CTL:
+ case WCD938X_DIGITAL_CDC_SWR_CLH:
+ case WCD938X_DIGITAL_SWR_CLH_BYP:
+ case WCD938X_DIGITAL_CDC_TX0_CTL:
+ case WCD938X_DIGITAL_CDC_TX1_CTL:
+ case WCD938X_DIGITAL_CDC_TX2_CTL:
+ case WCD938X_DIGITAL_CDC_TX_RST:
+ case WCD938X_DIGITAL_CDC_REQ_CTL:
+ case WCD938X_DIGITAL_CDC_RST:
+ case WCD938X_DIGITAL_CDC_AMIC_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC1_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC2_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC3_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC4_CTL:
+ case WCD938X_DIGITAL_EFUSE_PRG_CTL:
+ case WCD938X_DIGITAL_EFUSE_CTL:
+ case WCD938X_DIGITAL_CDC_DMIC_RATE_1_2:
+ case WCD938X_DIGITAL_CDC_DMIC_RATE_3_4:
+ case WCD938X_DIGITAL_PDM_WD_CTL0:
+ case WCD938X_DIGITAL_PDM_WD_CTL1:
+ case WCD938X_DIGITAL_PDM_WD_CTL2:
+ case WCD938X_DIGITAL_INTR_MODE:
+ case WCD938X_DIGITAL_INTR_MASK_0:
+ case WCD938X_DIGITAL_INTR_MASK_1:
+ case WCD938X_DIGITAL_INTR_MASK_2:
+ case WCD938X_DIGITAL_INTR_CLEAR_0:
+ case WCD938X_DIGITAL_INTR_CLEAR_1:
+ case WCD938X_DIGITAL_INTR_CLEAR_2:
+ case WCD938X_DIGITAL_INTR_LEVEL_0:
+ case WCD938X_DIGITAL_INTR_LEVEL_1:
+ case WCD938X_DIGITAL_INTR_LEVEL_2:
+ case WCD938X_DIGITAL_INTR_SET_0:
+ case WCD938X_DIGITAL_INTR_SET_1:
+ case WCD938X_DIGITAL_INTR_SET_2:
+ case WCD938X_DIGITAL_INTR_TEST_0:
+ case WCD938X_DIGITAL_INTR_TEST_1:
+ case WCD938X_DIGITAL_INTR_TEST_2:
+ case WCD938X_DIGITAL_TX_MODE_DBG_EN:
+ case WCD938X_DIGITAL_TX_MODE_DBG_0_1:
+ case WCD938X_DIGITAL_TX_MODE_DBG_2_3:
+ case WCD938X_DIGITAL_LB_IN_SEL_CTL:
+ case WCD938X_DIGITAL_LOOP_BACK_MODE:
+ case WCD938X_DIGITAL_SWR_DAC_TEST:
+ case WCD938X_DIGITAL_SWR_HM_TEST_RX_0:
+ case WCD938X_DIGITAL_SWR_HM_TEST_TX_0:
+ case WCD938X_DIGITAL_SWR_HM_TEST_RX_1:
+ case WCD938X_DIGITAL_SWR_HM_TEST_TX_1:
+ case WCD938X_DIGITAL_SWR_HM_TEST_TX_2:
+ case WCD938X_DIGITAL_PAD_CTL_SWR_0:
+ case WCD938X_DIGITAL_PAD_CTL_SWR_1:
+ case WCD938X_DIGITAL_I2C_CTL:
+ case WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE:
+ case WCD938X_DIGITAL_EFUSE_TEST_CTL_0:
+ case WCD938X_DIGITAL_EFUSE_TEST_CTL_1:
+ case WCD938X_DIGITAL_PAD_CTL_PDM_RX0:
+ case WCD938X_DIGITAL_PAD_CTL_PDM_RX1:
+ case WCD938X_DIGITAL_PAD_CTL_PDM_TX0:
+ case WCD938X_DIGITAL_PAD_CTL_PDM_TX1:
+ case WCD938X_DIGITAL_PAD_CTL_PDM_TX2:
+ case WCD938X_DIGITAL_PAD_INP_DIS_0:
+ case WCD938X_DIGITAL_PAD_INP_DIS_1:
+ case WCD938X_DIGITAL_DRIVE_STRENGTH_0:
+ case WCD938X_DIGITAL_DRIVE_STRENGTH_1:
+ case WCD938X_DIGITAL_DRIVE_STRENGTH_2:
+ case WCD938X_DIGITAL_RX_DATA_EDGE_CTL:
+ case WCD938X_DIGITAL_TX_DATA_EDGE_CTL:
+ case WCD938X_DIGITAL_GPIO_MODE:
+ case WCD938X_DIGITAL_PIN_CTL_OE:
+ case WCD938X_DIGITAL_PIN_CTL_DATA_0:
+ case WCD938X_DIGITAL_PIN_CTL_DATA_1:
+ case WCD938X_DIGITAL_DIG_DEBUG_CTL:
+ case WCD938X_DIGITAL_DIG_DEBUG_EN:
+ case WCD938X_DIGITAL_ANA_CSR_DBG_ADD:
+ case WCD938X_DIGITAL_ANA_CSR_DBG_CTL:
+ case WCD938X_DIGITAL_SSP_DBG:
+ case WCD938X_DIGITAL_SPARE_0:
+ case WCD938X_DIGITAL_SPARE_1:
+ case WCD938X_DIGITAL_SPARE_2:
+ case WCD938X_DIGITAL_TX_REQ_FB_CTL_0:
+ case WCD938X_DIGITAL_TX_REQ_FB_CTL_1:
+ case WCD938X_DIGITAL_TX_REQ_FB_CTL_2:
+ case WCD938X_DIGITAL_TX_REQ_FB_CTL_3:
+ case WCD938X_DIGITAL_TX_REQ_FB_CTL_4:
+ case WCD938X_DIGITAL_DEM_BYPASS_DATA0:
+ case WCD938X_DIGITAL_DEM_BYPASS_DATA1:
+ case WCD938X_DIGITAL_DEM_BYPASS_DATA2:
+ case WCD938X_DIGITAL_DEM_BYPASS_DATA3:
+ return true;
+ }
+
+ return false;
+}
+
+static bool wcd938x_readonly_register(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case WCD938X_ANA_MBHC_RESULT_1:
+ case WCD938X_ANA_MBHC_RESULT_2:
+ case WCD938X_ANA_MBHC_RESULT_3:
+ case WCD938X_MBHC_MOISTURE_DET_FSM_STATUS:
+ case WCD938X_TX_1_2_SAR2_ERR:
+ case WCD938X_TX_1_2_SAR1_ERR:
+ case WCD938X_TX_3_4_SAR4_ERR:
+ case WCD938X_TX_3_4_SAR3_ERR:
+ case WCD938X_HPH_L_STATUS:
+ case WCD938X_HPH_R_STATUS:
+ case WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS:
+ case WCD938X_EAR_STATUS_REG_1:
+ case WCD938X_EAR_STATUS_REG_2:
+ case WCD938X_MBHC_NEW_FSM_STATUS:
+ case WCD938X_MBHC_NEW_ADC_RESULT:
+ case WCD938X_DIE_CRACK_DIE_CRK_DET_OUT:
+ case WCD938X_AUX_INT_STATUS_REG:
+ case WCD938X_LDORXTX_INT_STATUS:
+ case WCD938X_DIGITAL_CHIP_ID0:
+ case WCD938X_DIGITAL_CHIP_ID1:
+ case WCD938X_DIGITAL_CHIP_ID2:
+ case WCD938X_DIGITAL_CHIP_ID3:
+ case WCD938X_DIGITAL_INTR_STATUS_0:
+ case WCD938X_DIGITAL_INTR_STATUS_1:
+ case WCD938X_DIGITAL_INTR_STATUS_2:
+ case WCD938X_DIGITAL_INTR_CLEAR_0:
+ case WCD938X_DIGITAL_INTR_CLEAR_1:
+ case WCD938X_DIGITAL_INTR_CLEAR_2:
+ case WCD938X_DIGITAL_SWR_HM_TEST_0:
+ case WCD938X_DIGITAL_SWR_HM_TEST_1:
+ case WCD938X_DIGITAL_EFUSE_T_DATA_0:
+ case WCD938X_DIGITAL_EFUSE_T_DATA_1:
+ case WCD938X_DIGITAL_PIN_STATUS_0:
+ case WCD938X_DIGITAL_PIN_STATUS_1:
+ case WCD938X_DIGITAL_MODE_STATUS_0:
+ case WCD938X_DIGITAL_MODE_STATUS_1:
+ case WCD938X_DIGITAL_EFUSE_REG_0:
+ case WCD938X_DIGITAL_EFUSE_REG_1:
+ case WCD938X_DIGITAL_EFUSE_REG_2:
+ case WCD938X_DIGITAL_EFUSE_REG_3:
+ case WCD938X_DIGITAL_EFUSE_REG_4:
+ case WCD938X_DIGITAL_EFUSE_REG_5:
+ case WCD938X_DIGITAL_EFUSE_REG_6:
+ case WCD938X_DIGITAL_EFUSE_REG_7:
+ case WCD938X_DIGITAL_EFUSE_REG_8:
+ case WCD938X_DIGITAL_EFUSE_REG_9:
+ case WCD938X_DIGITAL_EFUSE_REG_10:
+ case WCD938X_DIGITAL_EFUSE_REG_11:
+ case WCD938X_DIGITAL_EFUSE_REG_12:
+ case WCD938X_DIGITAL_EFUSE_REG_13:
+ case WCD938X_DIGITAL_EFUSE_REG_14:
+ case WCD938X_DIGITAL_EFUSE_REG_15:
+ case WCD938X_DIGITAL_EFUSE_REG_16:
+ case WCD938X_DIGITAL_EFUSE_REG_17:
+ case WCD938X_DIGITAL_EFUSE_REG_18:
+ case WCD938X_DIGITAL_EFUSE_REG_19:
+ case WCD938X_DIGITAL_EFUSE_REG_20:
+ case WCD938X_DIGITAL_EFUSE_REG_21:
+ case WCD938X_DIGITAL_EFUSE_REG_22:
+ case WCD938X_DIGITAL_EFUSE_REG_23:
+ case WCD938X_DIGITAL_EFUSE_REG_24:
+ case WCD938X_DIGITAL_EFUSE_REG_25:
+ case WCD938X_DIGITAL_EFUSE_REG_26:
+ case WCD938X_DIGITAL_EFUSE_REG_27:
+ case WCD938X_DIGITAL_EFUSE_REG_28:
+ case WCD938X_DIGITAL_EFUSE_REG_29:
+ case WCD938X_DIGITAL_EFUSE_REG_30:
+ case WCD938X_DIGITAL_EFUSE_REG_31:
+ return true;
+ }
+ return false;
+}
+
+static bool wcd938x_readable_register(struct device *dev, unsigned int reg)
+{
+ bool ret;
+
+ ret = wcd938x_readonly_register(dev, reg);
+ if (!ret)
+ return wcd938x_rdwr_register(dev, reg);
+
+ return ret;
+}
+
+static bool wcd938x_writeable_register(struct device *dev, unsigned int reg)
+{
+ return wcd938x_rdwr_register(dev, reg);
+}
+
+static bool wcd938x_volatile_register(struct device *dev, unsigned int reg)
+{
+ if (reg <= WCD938X_BASE_ADDRESS)
+ return false;
+
+ if (reg == WCD938X_DIGITAL_SWR_TX_CLK_RATE)
+ return true;
+
+ if (wcd938x_readonly_register(dev, reg))
+ return true;
+
+ return false;
+}
+
+static const struct regmap_config wcd938x_regmap_config = {
+ .name = "wcd938x_csr",
+ .reg_bits = 32,
+ .val_bits = 8,
+ .cache_type = REGCACHE_RBTREE,
+ .reg_defaults = wcd938x_defaults,
+ .num_reg_defaults = ARRAY_SIZE(wcd938x_defaults),
+ .max_register = WCD938X_MAX_REGISTER,
+ .readable_reg = wcd938x_readable_register,
+ .writeable_reg = wcd938x_writeable_register,
+ .volatile_reg = wcd938x_volatile_register,
+ .can_multi_write = true,
+};
+
static const struct sdw_slave_ops wcd9380_slave_ops = {
.update_status = wcd9380_update_status,
.interrupt_callback = wcd9380_interrupt_callback,
@@ -261,6 +1263,16 @@ static int wcd9380_probe(struct sdw_slave *pdev,
wcd->ch_info = &wcd938x_sdw_rx_ch_info[0];
}
+ if (wcd->is_tx) {
+ wcd->regmap = devm_regmap_init_sdw(pdev, &wcd938x_regmap_config);
+ if (IS_ERR(wcd->regmap))
+ return dev_err_probe(dev, PTR_ERR(wcd->regmap),
+ "Regmap init failed\n");
+
+ /* Start in cache-only until device is enumerated */
+ regcache_cache_only(wcd->regmap, true);
+ };
+
pm_runtime_set_autosuspend_delay(dev, 3000);
pm_runtime_use_autosuspend(dev);
pm_runtime_mark_last_busy(dev);
@@ -278,22 +1290,23 @@ MODULE_DEVICE_TABLE(sdw, wcd9380_slave_id);
static int __maybe_unused wcd938x_sdw_runtime_suspend(struct device *dev)
{
- struct regmap *regmap = dev_get_regmap(dev, NULL);
+ struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
- if (regmap) {
- regcache_cache_only(regmap, true);
- regcache_mark_dirty(regmap);
+ if (wcd->regmap) {
+ regcache_cache_only(wcd->regmap, true);
+ regcache_mark_dirty(wcd->regmap);
}
+
return 0;
}
static int __maybe_unused wcd938x_sdw_runtime_resume(struct device *dev)
{
- struct regmap *regmap = dev_get_regmap(dev, NULL);
+ struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
- if (regmap) {
- regcache_cache_only(regmap, false);
- regcache_sync(regmap);
+ if (wcd->regmap) {
+ regcache_cache_only(wcd->regmap, false);
+ regcache_sync(wcd->regmap);
}
pm_runtime_mark_last_busy(dev);
diff --git a/sound/soc/codecs/wcd938x.c b/sound/soc/codecs/wcd938x.c
index 11b264a63b04..e7d6a02cdec0 100644
--- a/sound/soc/codecs/wcd938x.c
+++ b/sound/soc/codecs/wcd938x.c
@@ -273,1001 +273,6 @@ static struct wcd_mbhc_field wcd_mbhc_fields[WCD_MBHC_REG_FUNC_MAX] = {
WCD_MBHC_FIELD(WCD_MBHC_ELECT_ISRC_EN, WCD938X_ANA_MBHC_ZDET, 0x02),
};
-static const struct reg_default wcd938x_defaults[] = {
- {WCD938X_ANA_PAGE_REGISTER, 0x00},
- {WCD938X_ANA_BIAS, 0x00},
- {WCD938X_ANA_RX_SUPPLIES, 0x00},
- {WCD938X_ANA_HPH, 0x0C},
- {WCD938X_ANA_EAR, 0x00},
- {WCD938X_ANA_EAR_COMPANDER_CTL, 0x02},
- {WCD938X_ANA_TX_CH1, 0x20},
- {WCD938X_ANA_TX_CH2, 0x00},
- {WCD938X_ANA_TX_CH3, 0x20},
- {WCD938X_ANA_TX_CH4, 0x00},
- {WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC, 0x00},
- {WCD938X_ANA_MICB3_DSP_EN_LOGIC, 0x00},
- {WCD938X_ANA_MBHC_MECH, 0x39},
- {WCD938X_ANA_MBHC_ELECT, 0x08},
- {WCD938X_ANA_MBHC_ZDET, 0x00},
- {WCD938X_ANA_MBHC_RESULT_1, 0x00},
- {WCD938X_ANA_MBHC_RESULT_2, 0x00},
- {WCD938X_ANA_MBHC_RESULT_3, 0x00},
- {WCD938X_ANA_MBHC_BTN0, 0x00},
- {WCD938X_ANA_MBHC_BTN1, 0x10},
- {WCD938X_ANA_MBHC_BTN2, 0x20},
- {WCD938X_ANA_MBHC_BTN3, 0x30},
- {WCD938X_ANA_MBHC_BTN4, 0x40},
- {WCD938X_ANA_MBHC_BTN5, 0x50},
- {WCD938X_ANA_MBHC_BTN6, 0x60},
- {WCD938X_ANA_MBHC_BTN7, 0x70},
- {WCD938X_ANA_MICB1, 0x10},
- {WCD938X_ANA_MICB2, 0x10},
- {WCD938X_ANA_MICB2_RAMP, 0x00},
- {WCD938X_ANA_MICB3, 0x10},
- {WCD938X_ANA_MICB4, 0x10},
- {WCD938X_BIAS_CTL, 0x2A},
- {WCD938X_BIAS_VBG_FINE_ADJ, 0x55},
- {WCD938X_LDOL_VDDCX_ADJUST, 0x01},
- {WCD938X_LDOL_DISABLE_LDOL, 0x00},
- {WCD938X_MBHC_CTL_CLK, 0x00},
- {WCD938X_MBHC_CTL_ANA, 0x00},
- {WCD938X_MBHC_CTL_SPARE_1, 0x00},
- {WCD938X_MBHC_CTL_SPARE_2, 0x00},
- {WCD938X_MBHC_CTL_BCS, 0x00},
- {WCD938X_MBHC_MOISTURE_DET_FSM_STATUS, 0x00},
- {WCD938X_MBHC_TEST_CTL, 0x00},
- {WCD938X_LDOH_MODE, 0x2B},
- {WCD938X_LDOH_BIAS, 0x68},
- {WCD938X_LDOH_STB_LOADS, 0x00},
- {WCD938X_LDOH_SLOWRAMP, 0x50},
- {WCD938X_MICB1_TEST_CTL_1, 0x1A},
- {WCD938X_MICB1_TEST_CTL_2, 0x00},
- {WCD938X_MICB1_TEST_CTL_3, 0xA4},
- {WCD938X_MICB2_TEST_CTL_1, 0x1A},
- {WCD938X_MICB2_TEST_CTL_2, 0x00},
- {WCD938X_MICB2_TEST_CTL_3, 0x24},
- {WCD938X_MICB3_TEST_CTL_1, 0x1A},
- {WCD938X_MICB3_TEST_CTL_2, 0x00},
- {WCD938X_MICB3_TEST_CTL_3, 0xA4},
- {WCD938X_MICB4_TEST_CTL_1, 0x1A},
- {WCD938X_MICB4_TEST_CTL_2, 0x00},
- {WCD938X_MICB4_TEST_CTL_3, 0xA4},
- {WCD938X_TX_COM_ADC_VCM, 0x39},
- {WCD938X_TX_COM_BIAS_ATEST, 0xE0},
- {WCD938X_TX_COM_SPARE1, 0x00},
- {WCD938X_TX_COM_SPARE2, 0x00},
- {WCD938X_TX_COM_TXFE_DIV_CTL, 0x22},
- {WCD938X_TX_COM_TXFE_DIV_START, 0x00},
- {WCD938X_TX_COM_SPARE3, 0x00},
- {WCD938X_TX_COM_SPARE4, 0x00},
- {WCD938X_TX_1_2_TEST_EN, 0xCC},
- {WCD938X_TX_1_2_ADC_IB, 0xE9},
- {WCD938X_TX_1_2_ATEST_REFCTL, 0x0A},
- {WCD938X_TX_1_2_TEST_CTL, 0x38},
- {WCD938X_TX_1_2_TEST_BLK_EN1, 0xFF},
- {WCD938X_TX_1_2_TXFE1_CLKDIV, 0x00},
- {WCD938X_TX_1_2_SAR2_ERR, 0x00},
- {WCD938X_TX_1_2_SAR1_ERR, 0x00},
- {WCD938X_TX_3_4_TEST_EN, 0xCC},
- {WCD938X_TX_3_4_ADC_IB, 0xE9},
- {WCD938X_TX_3_4_ATEST_REFCTL, 0x0A},
- {WCD938X_TX_3_4_TEST_CTL, 0x38},
- {WCD938X_TX_3_4_TEST_BLK_EN3, 0xFF},
- {WCD938X_TX_3_4_TXFE3_CLKDIV, 0x00},
- {WCD938X_TX_3_4_SAR4_ERR, 0x00},
- {WCD938X_TX_3_4_SAR3_ERR, 0x00},
- {WCD938X_TX_3_4_TEST_BLK_EN2, 0xFB},
- {WCD938X_TX_3_4_TXFE2_CLKDIV, 0x00},
- {WCD938X_TX_3_4_SPARE1, 0x00},
- {WCD938X_TX_3_4_TEST_BLK_EN4, 0xFB},
- {WCD938X_TX_3_4_TXFE4_CLKDIV, 0x00},
- {WCD938X_TX_3_4_SPARE2, 0x00},
- {WCD938X_CLASSH_MODE_1, 0x40},
- {WCD938X_CLASSH_MODE_2, 0x3A},
- {WCD938X_CLASSH_MODE_3, 0x00},
- {WCD938X_CLASSH_CTRL_VCL_1, 0x70},
- {WCD938X_CLASSH_CTRL_VCL_2, 0x82},
- {WCD938X_CLASSH_CTRL_CCL_1, 0x31},
- {WCD938X_CLASSH_CTRL_CCL_2, 0x80},
- {WCD938X_CLASSH_CTRL_CCL_3, 0x80},
- {WCD938X_CLASSH_CTRL_CCL_4, 0x51},
- {WCD938X_CLASSH_CTRL_CCL_5, 0x00},
- {WCD938X_CLASSH_BUCK_TMUX_A_D, 0x00},
- {WCD938X_CLASSH_BUCK_SW_DRV_CNTL, 0x77},
- {WCD938X_CLASSH_SPARE, 0x00},
- {WCD938X_FLYBACK_EN, 0x4E},
- {WCD938X_FLYBACK_VNEG_CTRL_1, 0x0B},
- {WCD938X_FLYBACK_VNEG_CTRL_2, 0x45},
- {WCD938X_FLYBACK_VNEG_CTRL_3, 0x74},
- {WCD938X_FLYBACK_VNEG_CTRL_4, 0x7F},
- {WCD938X_FLYBACK_VNEG_CTRL_5, 0x83},
- {WCD938X_FLYBACK_VNEG_CTRL_6, 0x98},
- {WCD938X_FLYBACK_VNEG_CTRL_7, 0xA9},
- {WCD938X_FLYBACK_VNEG_CTRL_8, 0x68},
- {WCD938X_FLYBACK_VNEG_CTRL_9, 0x64},
- {WCD938X_FLYBACK_VNEGDAC_CTRL_1, 0xED},
- {WCD938X_FLYBACK_VNEGDAC_CTRL_2, 0xF0},
- {WCD938X_FLYBACK_VNEGDAC_CTRL_3, 0xA6},
- {WCD938X_FLYBACK_CTRL_1, 0x65},
- {WCD938X_FLYBACK_TEST_CTL, 0x00},
- {WCD938X_RX_AUX_SW_CTL, 0x00},
- {WCD938X_RX_PA_AUX_IN_CONN, 0x01},
- {WCD938X_RX_TIMER_DIV, 0x32},
- {WCD938X_RX_OCP_CTL, 0x1F},
- {WCD938X_RX_OCP_COUNT, 0x77},
- {WCD938X_RX_BIAS_EAR_DAC, 0xA0},
- {WCD938X_RX_BIAS_EAR_AMP, 0xAA},
- {WCD938X_RX_BIAS_HPH_LDO, 0xA9},
- {WCD938X_RX_BIAS_HPH_PA, 0xAA},
- {WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2, 0x8A},
- {WCD938X_RX_BIAS_HPH_RDAC_LDO, 0x88},
- {WCD938X_RX_BIAS_HPH_CNP1, 0x82},
- {WCD938X_RX_BIAS_HPH_LOWPOWER, 0x82},
- {WCD938X_RX_BIAS_AUX_DAC, 0xA0},
- {WCD938X_RX_BIAS_AUX_AMP, 0xAA},
- {WCD938X_RX_BIAS_VNEGDAC_BLEEDER, 0x50},
- {WCD938X_RX_BIAS_MISC, 0x00},
- {WCD938X_RX_BIAS_BUCK_RST, 0x08},
- {WCD938X_RX_BIAS_BUCK_VREF_ERRAMP, 0x44},
- {WCD938X_RX_BIAS_FLYB_ERRAMP, 0x40},
- {WCD938X_RX_BIAS_FLYB_BUFF, 0xAA},
- {WCD938X_RX_BIAS_FLYB_MID_RST, 0x14},
- {WCD938X_HPH_L_STATUS, 0x04},
- {WCD938X_HPH_R_STATUS, 0x04},
- {WCD938X_HPH_CNP_EN, 0x80},
- {WCD938X_HPH_CNP_WG_CTL, 0x9A},
- {WCD938X_HPH_CNP_WG_TIME, 0x14},
- {WCD938X_HPH_OCP_CTL, 0x28},
- {WCD938X_HPH_AUTO_CHOP, 0x16},
- {WCD938X_HPH_CHOP_CTL, 0x83},
- {WCD938X_HPH_PA_CTL1, 0x46},
- {WCD938X_HPH_PA_CTL2, 0x50},
- {WCD938X_HPH_L_EN, 0x80},
- {WCD938X_HPH_L_TEST, 0xE0},
- {WCD938X_HPH_L_ATEST, 0x50},
- {WCD938X_HPH_R_EN, 0x80},
- {WCD938X_HPH_R_TEST, 0xE0},
- {WCD938X_HPH_R_ATEST, 0x54},
- {WCD938X_HPH_RDAC_CLK_CTL1, 0x99},
- {WCD938X_HPH_RDAC_CLK_CTL2, 0x9B},
- {WCD938X_HPH_RDAC_LDO_CTL, 0x33},
- {WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL, 0x00},
- {WCD938X_HPH_REFBUFF_UHQA_CTL, 0x68},
- {WCD938X_HPH_REFBUFF_LP_CTL, 0x0E},
- {WCD938X_HPH_L_DAC_CTL, 0x20},
- {WCD938X_HPH_R_DAC_CTL, 0x20},
- {WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL, 0x55},
- {WCD938X_HPH_SURGE_HPHLR_SURGE_EN, 0x19},
- {WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1, 0xA0},
- {WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS, 0x00},
- {WCD938X_EAR_EAR_EN_REG, 0x22},
- {WCD938X_EAR_EAR_PA_CON, 0x44},
- {WCD938X_EAR_EAR_SP_CON, 0xDB},
- {WCD938X_EAR_EAR_DAC_CON, 0x80},
- {WCD938X_EAR_EAR_CNP_FSM_CON, 0xB2},
- {WCD938X_EAR_TEST_CTL, 0x00},
- {WCD938X_EAR_STATUS_REG_1, 0x00},
- {WCD938X_EAR_STATUS_REG_2, 0x08},
- {WCD938X_ANA_NEW_PAGE_REGISTER, 0x00},
- {WCD938X_HPH_NEW_ANA_HPH2, 0x00},
- {WCD938X_HPH_NEW_ANA_HPH3, 0x00},
- {WCD938X_SLEEP_CTL, 0x16},
- {WCD938X_SLEEP_WATCHDOG_CTL, 0x00},
- {WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL, 0x00},
- {WCD938X_MBHC_NEW_CTL_1, 0x02},
- {WCD938X_MBHC_NEW_CTL_2, 0x05},
- {WCD938X_MBHC_NEW_PLUG_DETECT_CTL, 0xE9},
- {WCD938X_MBHC_NEW_ZDET_ANA_CTL, 0x0F},
- {WCD938X_MBHC_NEW_ZDET_RAMP_CTL, 0x00},
- {WCD938X_MBHC_NEW_FSM_STATUS, 0x00},
- {WCD938X_MBHC_NEW_ADC_RESULT, 0x00},
- {WCD938X_TX_NEW_AMIC_MUX_CFG, 0x00},
- {WCD938X_AUX_AUXPA, 0x00},
- {WCD938X_LDORXTX_MODE, 0x0C},
- {WCD938X_LDORXTX_CONFIG, 0x10},
- {WCD938X_DIE_CRACK_DIE_CRK_DET_EN, 0x00},
- {WCD938X_DIE_CRACK_DIE_CRK_DET_OUT, 0x00},
- {WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL, 0x40},
- {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L, 0x81},
- {WCD938X_HPH_NEW_INT_RDAC_VREF_CTL, 0x10},
- {WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL, 0x00},
- {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0x81},
- {WCD938X_HPH_NEW_INT_PA_MISC1, 0x22},
- {WCD938X_HPH_NEW_INT_PA_MISC2, 0x00},
- {WCD938X_HPH_NEW_INT_PA_RDAC_MISC, 0x00},
- {WCD938X_HPH_NEW_INT_HPH_TIMER1, 0xFE},
- {WCD938X_HPH_NEW_INT_HPH_TIMER2, 0x02},
- {WCD938X_HPH_NEW_INT_HPH_TIMER3, 0x4E},
- {WCD938X_HPH_NEW_INT_HPH_TIMER4, 0x54},
- {WCD938X_HPH_NEW_INT_PA_RDAC_MISC2, 0x00},
- {WCD938X_HPH_NEW_INT_PA_RDAC_MISC3, 0x00},
- {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW, 0x90},
- {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW, 0x90},
- {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI, 0x62},
- {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP, 0x01},
- {WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP, 0x11},
- {WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL, 0x57},
- {WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL, 0x01},
- {WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT, 0x00},
- {WCD938X_MBHC_NEW_INT_SPARE_2, 0x00},
- {WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON, 0xA8},
- {WCD938X_EAR_INT_NEW_CNP_VCM_CON1, 0x42},
- {WCD938X_EAR_INT_NEW_CNP_VCM_CON2, 0x22},
- {WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS, 0x00},
- {WCD938X_AUX_INT_EN_REG, 0x00},
- {WCD938X_AUX_INT_PA_CTRL, 0x06},
- {WCD938X_AUX_INT_SP_CTRL, 0xD2},
- {WCD938X_AUX_INT_DAC_CTRL, 0x80},
- {WCD938X_AUX_INT_CLK_CTRL, 0x50},
- {WCD938X_AUX_INT_TEST_CTRL, 0x00},
- {WCD938X_AUX_INT_STATUS_REG, 0x00},
- {WCD938X_AUX_INT_MISC, 0x00},
- {WCD938X_LDORXTX_INT_BIAS, 0x6E},
- {WCD938X_LDORXTX_INT_STB_LOADS_DTEST, 0x50},
- {WCD938X_LDORXTX_INT_TEST0, 0x1C},
- {WCD938X_LDORXTX_INT_STARTUP_TIMER, 0xFF},
- {WCD938X_LDORXTX_INT_TEST1, 0x1F},
- {WCD938X_LDORXTX_INT_STATUS, 0x00},
- {WCD938X_SLEEP_INT_WATCHDOG_CTL_1, 0x0A},
- {WCD938X_SLEEP_INT_WATCHDOG_CTL_2, 0x0A},
- {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1, 0x02},
- {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2, 0x60},
- {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2, 0xFF},
- {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1, 0x7F},
- {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0, 0x3F},
- {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M, 0x1F},
- {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M, 0x0F},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1, 0xD7},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0, 0xC8},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP, 0xC6},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1, 0xD5},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0, 0xCA},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP, 0x05},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0, 0xA5},
- {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP, 0x13},
- {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1, 0x88},
- {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP, 0x42},
- {WCD938X_TX_COM_NEW_INT_TXADC_INT_L2, 0xFF},
- {WCD938X_TX_COM_NEW_INT_TXADC_INT_L1, 0x64},
- {WCD938X_TX_COM_NEW_INT_TXADC_INT_L0, 0x64},
- {WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP, 0x77},
- {WCD938X_DIGITAL_PAGE_REGISTER, 0x00},
- {WCD938X_DIGITAL_CHIP_ID0, 0x00},
- {WCD938X_DIGITAL_CHIP_ID1, 0x00},
- {WCD938X_DIGITAL_CHIP_ID2, 0x0D},
- {WCD938X_DIGITAL_CHIP_ID3, 0x01},
- {WCD938X_DIGITAL_SWR_TX_CLK_RATE, 0x00},
- {WCD938X_DIGITAL_CDC_RST_CTL, 0x03},
- {WCD938X_DIGITAL_TOP_CLK_CFG, 0x00},
- {WCD938X_DIGITAL_CDC_ANA_CLK_CTL, 0x00},
- {WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0xF0},
- {WCD938X_DIGITAL_SWR_RST_EN, 0x00},
- {WCD938X_DIGITAL_CDC_PATH_MODE, 0x55},
- {WCD938X_DIGITAL_CDC_RX_RST, 0x00},
- {WCD938X_DIGITAL_CDC_RX0_CTL, 0xFC},
- {WCD938X_DIGITAL_CDC_RX1_CTL, 0xFC},
- {WCD938X_DIGITAL_CDC_RX2_CTL, 0xFC},
- {WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0x00},
- {WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0x00},
- {WCD938X_DIGITAL_CDC_COMP_CTL_0, 0x00},
- {WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL, 0x1E},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A1_0, 0x00},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A1_1, 0x01},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A2_0, 0x63},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A2_1, 0x04},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A3_0, 0xAC},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A3_1, 0x04},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A4_0, 0x1A},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A4_1, 0x03},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A5_0, 0xBC},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A5_1, 0x02},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A6_0, 0xC7},
- {WCD938X_DIGITAL_CDC_HPH_DSM_A7_0, 0xF8},
- {WCD938X_DIGITAL_CDC_HPH_DSM_C_0, 0x47},
- {WCD938X_DIGITAL_CDC_HPH_DSM_C_1, 0x43},
- {WCD938X_DIGITAL_CDC_HPH_DSM_C_2, 0xB1},
- {WCD938X_DIGITAL_CDC_HPH_DSM_C_3, 0x17},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R1, 0x4D},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R2, 0x29},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R3, 0x34},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R4, 0x59},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R5, 0x66},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R6, 0x87},
- {WCD938X_DIGITAL_CDC_HPH_DSM_R7, 0x64},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A1_0, 0x00},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A1_1, 0x01},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A2_0, 0x96},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A2_1, 0x09},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A3_0, 0xAB},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A3_1, 0x05},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A4_0, 0x1C},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A4_1, 0x02},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A5_0, 0x17},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A5_1, 0x02},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A6_0, 0xAA},
- {WCD938X_DIGITAL_CDC_AUX_DSM_A7_0, 0xE3},
- {WCD938X_DIGITAL_CDC_AUX_DSM_C_0, 0x69},
- {WCD938X_DIGITAL_CDC_AUX_DSM_C_1, 0x54},
- {WCD938X_DIGITAL_CDC_AUX_DSM_C_2, 0x02},
- {WCD938X_DIGITAL_CDC_AUX_DSM_C_3, 0x15},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R1, 0xA4},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R2, 0xB5},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R3, 0x86},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R4, 0x85},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R5, 0xAA},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R6, 0xE2},
- {WCD938X_DIGITAL_CDC_AUX_DSM_R7, 0x62},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0, 0x55},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1, 0xA9},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0, 0x3D},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1, 0x2E},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2, 0x01},
- {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0, 0x00},
- {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1, 0xFC},
- {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2, 0x01},
- {WCD938X_DIGITAL_CDC_HPH_GAIN_CTL, 0x00},
- {WCD938X_DIGITAL_CDC_AUX_GAIN_CTL, 0x00},
- {WCD938X_DIGITAL_CDC_EAR_PATH_CTL, 0x00},
- {WCD938X_DIGITAL_CDC_SWR_CLH, 0x00},
- {WCD938X_DIGITAL_SWR_CLH_BYP, 0x00},
- {WCD938X_DIGITAL_CDC_TX0_CTL, 0x68},
- {WCD938X_DIGITAL_CDC_TX1_CTL, 0x68},
- {WCD938X_DIGITAL_CDC_TX2_CTL, 0x68},
- {WCD938X_DIGITAL_CDC_TX_RST, 0x00},
- {WCD938X_DIGITAL_CDC_REQ_CTL, 0x01},
- {WCD938X_DIGITAL_CDC_RST, 0x00},
- {WCD938X_DIGITAL_CDC_AMIC_CTL, 0x0F},
- {WCD938X_DIGITAL_CDC_DMIC_CTL, 0x04},
- {WCD938X_DIGITAL_CDC_DMIC1_CTL, 0x01},
- {WCD938X_DIGITAL_CDC_DMIC2_CTL, 0x01},
- {WCD938X_DIGITAL_CDC_DMIC3_CTL, 0x01},
- {WCD938X_DIGITAL_CDC_DMIC4_CTL, 0x01},
- {WCD938X_DIGITAL_EFUSE_PRG_CTL, 0x00},
- {WCD938X_DIGITAL_EFUSE_CTL, 0x2B},
- {WCD938X_DIGITAL_CDC_DMIC_RATE_1_2, 0x11},
- {WCD938X_DIGITAL_CDC_DMIC_RATE_3_4, 0x11},
- {WCD938X_DIGITAL_PDM_WD_CTL0, 0x00},
- {WCD938X_DIGITAL_PDM_WD_CTL1, 0x00},
- {WCD938X_DIGITAL_PDM_WD_CTL2, 0x00},
- {WCD938X_DIGITAL_INTR_MODE, 0x00},
- {WCD938X_DIGITAL_INTR_MASK_0, 0xFF},
- {WCD938X_DIGITAL_INTR_MASK_1, 0xFF},
- {WCD938X_DIGITAL_INTR_MASK_2, 0x3F},
- {WCD938X_DIGITAL_INTR_STATUS_0, 0x00},
- {WCD938X_DIGITAL_INTR_STATUS_1, 0x00},
- {WCD938X_DIGITAL_INTR_STATUS_2, 0x00},
- {WCD938X_DIGITAL_INTR_CLEAR_0, 0x00},
- {WCD938X_DIGITAL_INTR_CLEAR_1, 0x00},
- {WCD938X_DIGITAL_INTR_CLEAR_2, 0x00},
- {WCD938X_DIGITAL_INTR_LEVEL_0, 0x00},
- {WCD938X_DIGITAL_INTR_LEVEL_1, 0x00},
- {WCD938X_DIGITAL_INTR_LEVEL_2, 0x00},
- {WCD938X_DIGITAL_INTR_SET_0, 0x00},
- {WCD938X_DIGITAL_INTR_SET_1, 0x00},
- {WCD938X_DIGITAL_INTR_SET_2, 0x00},
- {WCD938X_DIGITAL_INTR_TEST_0, 0x00},
- {WCD938X_DIGITAL_INTR_TEST_1, 0x00},
- {WCD938X_DIGITAL_INTR_TEST_2, 0x00},
- {WCD938X_DIGITAL_TX_MODE_DBG_EN, 0x00},
- {WCD938X_DIGITAL_TX_MODE_DBG_0_1, 0x00},
- {WCD938X_DIGITAL_TX_MODE_DBG_2_3, 0x00},
- {WCD938X_DIGITAL_LB_IN_SEL_CTL, 0x00},
- {WCD938X_DIGITAL_LOOP_BACK_MODE, 0x00},
- {WCD938X_DIGITAL_SWR_DAC_TEST, 0x00},
- {WCD938X_DIGITAL_SWR_HM_TEST_RX_0, 0x40},
- {WCD938X_DIGITAL_SWR_HM_TEST_TX_0, 0x40},
- {WCD938X_DIGITAL_SWR_HM_TEST_RX_1, 0x00},
- {WCD938X_DIGITAL_SWR_HM_TEST_TX_1, 0x00},
- {WCD938X_DIGITAL_SWR_HM_TEST_TX_2, 0x00},
- {WCD938X_DIGITAL_SWR_HM_TEST_0, 0x00},
- {WCD938X_DIGITAL_SWR_HM_TEST_1, 0x00},
- {WCD938X_DIGITAL_PAD_CTL_SWR_0, 0x8F},
- {WCD938X_DIGITAL_PAD_CTL_SWR_1, 0x06},
- {WCD938X_DIGITAL_I2C_CTL, 0x00},
- {WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE, 0x00},
- {WCD938X_DIGITAL_EFUSE_TEST_CTL_0, 0x00},
- {WCD938X_DIGITAL_EFUSE_TEST_CTL_1, 0x00},
- {WCD938X_DIGITAL_EFUSE_T_DATA_0, 0x00},
- {WCD938X_DIGITAL_EFUSE_T_DATA_1, 0x00},
- {WCD938X_DIGITAL_PAD_CTL_PDM_RX0, 0xF1},
- {WCD938X_DIGITAL_PAD_CTL_PDM_RX1, 0xF1},
- {WCD938X_DIGITAL_PAD_CTL_PDM_TX0, 0xF1},
- {WCD938X_DIGITAL_PAD_CTL_PDM_TX1, 0xF1},
- {WCD938X_DIGITAL_PAD_CTL_PDM_TX2, 0xF1},
- {WCD938X_DIGITAL_PAD_INP_DIS_0, 0x00},
- {WCD938X_DIGITAL_PAD_INP_DIS_1, 0x00},
- {WCD938X_DIGITAL_DRIVE_STRENGTH_0, 0x00},
- {WCD938X_DIGITAL_DRIVE_STRENGTH_1, 0x00},
- {WCD938X_DIGITAL_DRIVE_STRENGTH_2, 0x00},
- {WCD938X_DIGITAL_RX_DATA_EDGE_CTL, 0x1F},
- {WCD938X_DIGITAL_TX_DATA_EDGE_CTL, 0x80},
- {WCD938X_DIGITAL_GPIO_MODE, 0x00},
- {WCD938X_DIGITAL_PIN_CTL_OE, 0x00},
- {WCD938X_DIGITAL_PIN_CTL_DATA_0, 0x00},
- {WCD938X_DIGITAL_PIN_CTL_DATA_1, 0x00},
- {WCD938X_DIGITAL_PIN_STATUS_0, 0x00},
- {WCD938X_DIGITAL_PIN_STATUS_1, 0x00},
- {WCD938X_DIGITAL_DIG_DEBUG_CTL, 0x00},
- {WCD938X_DIGITAL_DIG_DEBUG_EN, 0x00},
- {WCD938X_DIGITAL_ANA_CSR_DBG_ADD, 0x00},
- {WCD938X_DIGITAL_ANA_CSR_DBG_CTL, 0x48},
- {WCD938X_DIGITAL_SSP_DBG, 0x00},
- {WCD938X_DIGITAL_MODE_STATUS_0, 0x00},
- {WCD938X_DIGITAL_MODE_STATUS_1, 0x00},
- {WCD938X_DIGITAL_SPARE_0, 0x00},
- {WCD938X_DIGITAL_SPARE_1, 0x00},
- {WCD938X_DIGITAL_SPARE_2, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_0, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_1, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_2, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_3, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_4, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_5, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_6, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_7, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_8, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_9, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_10, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_11, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_12, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_13, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_14, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_15, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_16, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_17, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_18, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_19, 0xFF},
- {WCD938X_DIGITAL_EFUSE_REG_20, 0x0E},
- {WCD938X_DIGITAL_EFUSE_REG_21, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_22, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_23, 0xF8},
- {WCD938X_DIGITAL_EFUSE_REG_24, 0x16},
- {WCD938X_DIGITAL_EFUSE_REG_25, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_26, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_27, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_28, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_29, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_30, 0x00},
- {WCD938X_DIGITAL_EFUSE_REG_31, 0x00},
- {WCD938X_DIGITAL_TX_REQ_FB_CTL_0, 0x88},
- {WCD938X_DIGITAL_TX_REQ_FB_CTL_1, 0x88},
- {WCD938X_DIGITAL_TX_REQ_FB_CTL_2, 0x88},
- {WCD938X_DIGITAL_TX_REQ_FB_CTL_3, 0x88},
- {WCD938X_DIGITAL_TX_REQ_FB_CTL_4, 0x88},
- {WCD938X_DIGITAL_DEM_BYPASS_DATA0, 0x55},
- {WCD938X_DIGITAL_DEM_BYPASS_DATA1, 0x55},
- {WCD938X_DIGITAL_DEM_BYPASS_DATA2, 0x55},
- {WCD938X_DIGITAL_DEM_BYPASS_DATA3, 0x01},
-};
-
-static bool wcd938x_rdwr_register(struct device *dev, unsigned int reg)
-{
- switch (reg) {
- case WCD938X_ANA_PAGE_REGISTER:
- case WCD938X_ANA_BIAS:
- case WCD938X_ANA_RX_SUPPLIES:
- case WCD938X_ANA_HPH:
- case WCD938X_ANA_EAR:
- case WCD938X_ANA_EAR_COMPANDER_CTL:
- case WCD938X_ANA_TX_CH1:
- case WCD938X_ANA_TX_CH2:
- case WCD938X_ANA_TX_CH3:
- case WCD938X_ANA_TX_CH4:
- case WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC:
- case WCD938X_ANA_MICB3_DSP_EN_LOGIC:
- case WCD938X_ANA_MBHC_MECH:
- case WCD938X_ANA_MBHC_ELECT:
- case WCD938X_ANA_MBHC_ZDET:
- case WCD938X_ANA_MBHC_BTN0:
- case WCD938X_ANA_MBHC_BTN1:
- case WCD938X_ANA_MBHC_BTN2:
- case WCD938X_ANA_MBHC_BTN3:
- case WCD938X_ANA_MBHC_BTN4:
- case WCD938X_ANA_MBHC_BTN5:
- case WCD938X_ANA_MBHC_BTN6:
- case WCD938X_ANA_MBHC_BTN7:
- case WCD938X_ANA_MICB1:
- case WCD938X_ANA_MICB2:
- case WCD938X_ANA_MICB2_RAMP:
- case WCD938X_ANA_MICB3:
- case WCD938X_ANA_MICB4:
- case WCD938X_BIAS_CTL:
- case WCD938X_BIAS_VBG_FINE_ADJ:
- case WCD938X_LDOL_VDDCX_ADJUST:
- case WCD938X_LDOL_DISABLE_LDOL:
- case WCD938X_MBHC_CTL_CLK:
- case WCD938X_MBHC_CTL_ANA:
- case WCD938X_MBHC_CTL_SPARE_1:
- case WCD938X_MBHC_CTL_SPARE_2:
- case WCD938X_MBHC_CTL_BCS:
- case WCD938X_MBHC_TEST_CTL:
- case WCD938X_LDOH_MODE:
- case WCD938X_LDOH_BIAS:
- case WCD938X_LDOH_STB_LOADS:
- case WCD938X_LDOH_SLOWRAMP:
- case WCD938X_MICB1_TEST_CTL_1:
- case WCD938X_MICB1_TEST_CTL_2:
- case WCD938X_MICB1_TEST_CTL_3:
- case WCD938X_MICB2_TEST_CTL_1:
- case WCD938X_MICB2_TEST_CTL_2:
- case WCD938X_MICB2_TEST_CTL_3:
- case WCD938X_MICB3_TEST_CTL_1:
- case WCD938X_MICB3_TEST_CTL_2:
- case WCD938X_MICB3_TEST_CTL_3:
- case WCD938X_MICB4_TEST_CTL_1:
- case WCD938X_MICB4_TEST_CTL_2:
- case WCD938X_MICB4_TEST_CTL_3:
- case WCD938X_TX_COM_ADC_VCM:
- case WCD938X_TX_COM_BIAS_ATEST:
- case WCD938X_TX_COM_SPARE1:
- case WCD938X_TX_COM_SPARE2:
- case WCD938X_TX_COM_TXFE_DIV_CTL:
- case WCD938X_TX_COM_TXFE_DIV_START:
- case WCD938X_TX_COM_SPARE3:
- case WCD938X_TX_COM_SPARE4:
- case WCD938X_TX_1_2_TEST_EN:
- case WCD938X_TX_1_2_ADC_IB:
- case WCD938X_TX_1_2_ATEST_REFCTL:
- case WCD938X_TX_1_2_TEST_CTL:
- case WCD938X_TX_1_2_TEST_BLK_EN1:
- case WCD938X_TX_1_2_TXFE1_CLKDIV:
- case WCD938X_TX_3_4_TEST_EN:
- case WCD938X_TX_3_4_ADC_IB:
- case WCD938X_TX_3_4_ATEST_REFCTL:
- case WCD938X_TX_3_4_TEST_CTL:
- case WCD938X_TX_3_4_TEST_BLK_EN3:
- case WCD938X_TX_3_4_TXFE3_CLKDIV:
- case WCD938X_TX_3_4_TEST_BLK_EN2:
- case WCD938X_TX_3_4_TXFE2_CLKDIV:
- case WCD938X_TX_3_4_SPARE1:
- case WCD938X_TX_3_4_TEST_BLK_EN4:
- case WCD938X_TX_3_4_TXFE4_CLKDIV:
- case WCD938X_TX_3_4_SPARE2:
- case WCD938X_CLASSH_MODE_1:
- case WCD938X_CLASSH_MODE_2:
- case WCD938X_CLASSH_MODE_3:
- case WCD938X_CLASSH_CTRL_VCL_1:
- case WCD938X_CLASSH_CTRL_VCL_2:
- case WCD938X_CLASSH_CTRL_CCL_1:
- case WCD938X_CLASSH_CTRL_CCL_2:
- case WCD938X_CLASSH_CTRL_CCL_3:
- case WCD938X_CLASSH_CTRL_CCL_4:
- case WCD938X_CLASSH_CTRL_CCL_5:
- case WCD938X_CLASSH_BUCK_TMUX_A_D:
- case WCD938X_CLASSH_BUCK_SW_DRV_CNTL:
- case WCD938X_CLASSH_SPARE:
- case WCD938X_FLYBACK_EN:
- case WCD938X_FLYBACK_VNEG_CTRL_1:
- case WCD938X_FLYBACK_VNEG_CTRL_2:
- case WCD938X_FLYBACK_VNEG_CTRL_3:
- case WCD938X_FLYBACK_VNEG_CTRL_4:
- case WCD938X_FLYBACK_VNEG_CTRL_5:
- case WCD938X_FLYBACK_VNEG_CTRL_6:
- case WCD938X_FLYBACK_VNEG_CTRL_7:
- case WCD938X_FLYBACK_VNEG_CTRL_8:
- case WCD938X_FLYBACK_VNEG_CTRL_9:
- case WCD938X_FLYBACK_VNEGDAC_CTRL_1:
- case WCD938X_FLYBACK_VNEGDAC_CTRL_2:
- case WCD938X_FLYBACK_VNEGDAC_CTRL_3:
- case WCD938X_FLYBACK_CTRL_1:
- case WCD938X_FLYBACK_TEST_CTL:
- case WCD938X_RX_AUX_SW_CTL:
- case WCD938X_RX_PA_AUX_IN_CONN:
- case WCD938X_RX_TIMER_DIV:
- case WCD938X_RX_OCP_CTL:
- case WCD938X_RX_OCP_COUNT:
- case WCD938X_RX_BIAS_EAR_DAC:
- case WCD938X_RX_BIAS_EAR_AMP:
- case WCD938X_RX_BIAS_HPH_LDO:
- case WCD938X_RX_BIAS_HPH_PA:
- case WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2:
- case WCD938X_RX_BIAS_HPH_RDAC_LDO:
- case WCD938X_RX_BIAS_HPH_CNP1:
- case WCD938X_RX_BIAS_HPH_LOWPOWER:
- case WCD938X_RX_BIAS_AUX_DAC:
- case WCD938X_RX_BIAS_AUX_AMP:
- case WCD938X_RX_BIAS_VNEGDAC_BLEEDER:
- case WCD938X_RX_BIAS_MISC:
- case WCD938X_RX_BIAS_BUCK_RST:
- case WCD938X_RX_BIAS_BUCK_VREF_ERRAMP:
- case WCD938X_RX_BIAS_FLYB_ERRAMP:
- case WCD938X_RX_BIAS_FLYB_BUFF:
- case WCD938X_RX_BIAS_FLYB_MID_RST:
- case WCD938X_HPH_CNP_EN:
- case WCD938X_HPH_CNP_WG_CTL:
- case WCD938X_HPH_CNP_WG_TIME:
- case WCD938X_HPH_OCP_CTL:
- case WCD938X_HPH_AUTO_CHOP:
- case WCD938X_HPH_CHOP_CTL:
- case WCD938X_HPH_PA_CTL1:
- case WCD938X_HPH_PA_CTL2:
- case WCD938X_HPH_L_EN:
- case WCD938X_HPH_L_TEST:
- case WCD938X_HPH_L_ATEST:
- case WCD938X_HPH_R_EN:
- case WCD938X_HPH_R_TEST:
- case WCD938X_HPH_R_ATEST:
- case WCD938X_HPH_RDAC_CLK_CTL1:
- case WCD938X_HPH_RDAC_CLK_CTL2:
- case WCD938X_HPH_RDAC_LDO_CTL:
- case WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL:
- case WCD938X_HPH_REFBUFF_UHQA_CTL:
- case WCD938X_HPH_REFBUFF_LP_CTL:
- case WCD938X_HPH_L_DAC_CTL:
- case WCD938X_HPH_R_DAC_CTL:
- case WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL:
- case WCD938X_HPH_SURGE_HPHLR_SURGE_EN:
- case WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1:
- case WCD938X_EAR_EAR_EN_REG:
- case WCD938X_EAR_EAR_PA_CON:
- case WCD938X_EAR_EAR_SP_CON:
- case WCD938X_EAR_EAR_DAC_CON:
- case WCD938X_EAR_EAR_CNP_FSM_CON:
- case WCD938X_EAR_TEST_CTL:
- case WCD938X_ANA_NEW_PAGE_REGISTER:
- case WCD938X_HPH_NEW_ANA_HPH2:
- case WCD938X_HPH_NEW_ANA_HPH3:
- case WCD938X_SLEEP_CTL:
- case WCD938X_SLEEP_WATCHDOG_CTL:
- case WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL:
- case WCD938X_MBHC_NEW_CTL_1:
- case WCD938X_MBHC_NEW_CTL_2:
- case WCD938X_MBHC_NEW_PLUG_DETECT_CTL:
- case WCD938X_MBHC_NEW_ZDET_ANA_CTL:
- case WCD938X_MBHC_NEW_ZDET_RAMP_CTL:
- case WCD938X_TX_NEW_AMIC_MUX_CFG:
- case WCD938X_AUX_AUXPA:
- case WCD938X_LDORXTX_MODE:
- case WCD938X_LDORXTX_CONFIG:
- case WCD938X_DIE_CRACK_DIE_CRK_DET_EN:
- case WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL:
- case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L:
- case WCD938X_HPH_NEW_INT_RDAC_VREF_CTL:
- case WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL:
- case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R:
- case WCD938X_HPH_NEW_INT_PA_MISC1:
- case WCD938X_HPH_NEW_INT_PA_MISC2:
- case WCD938X_HPH_NEW_INT_PA_RDAC_MISC:
- case WCD938X_HPH_NEW_INT_HPH_TIMER1:
- case WCD938X_HPH_NEW_INT_HPH_TIMER2:
- case WCD938X_HPH_NEW_INT_HPH_TIMER3:
- case WCD938X_HPH_NEW_INT_HPH_TIMER4:
- case WCD938X_HPH_NEW_INT_PA_RDAC_MISC2:
- case WCD938X_HPH_NEW_INT_PA_RDAC_MISC3:
- case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW:
- case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW:
- case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI:
- case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP:
- case WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP:
- case WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL:
- case WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL:
- case WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT:
- case WCD938X_MBHC_NEW_INT_SPARE_2:
- case WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON:
- case WCD938X_EAR_INT_NEW_CNP_VCM_CON1:
- case WCD938X_EAR_INT_NEW_CNP_VCM_CON2:
- case WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS:
- case WCD938X_AUX_INT_EN_REG:
- case WCD938X_AUX_INT_PA_CTRL:
- case WCD938X_AUX_INT_SP_CTRL:
- case WCD938X_AUX_INT_DAC_CTRL:
- case WCD938X_AUX_INT_CLK_CTRL:
- case WCD938X_AUX_INT_TEST_CTRL:
- case WCD938X_AUX_INT_MISC:
- case WCD938X_LDORXTX_INT_BIAS:
- case WCD938X_LDORXTX_INT_STB_LOADS_DTEST:
- case WCD938X_LDORXTX_INT_TEST0:
- case WCD938X_LDORXTX_INT_STARTUP_TIMER:
- case WCD938X_LDORXTX_INT_TEST1:
- case WCD938X_SLEEP_INT_WATCHDOG_CTL_1:
- case WCD938X_SLEEP_INT_WATCHDOG_CTL_2:
- case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1:
- case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2:
- case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2:
- case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1:
- case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0:
- case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M:
- case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0:
- case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP:
- case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1:
- case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP:
- case WCD938X_TX_COM_NEW_INT_TXADC_INT_L2:
- case WCD938X_TX_COM_NEW_INT_TXADC_INT_L1:
- case WCD938X_TX_COM_NEW_INT_TXADC_INT_L0:
- case WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP:
- case WCD938X_DIGITAL_PAGE_REGISTER:
- case WCD938X_DIGITAL_SWR_TX_CLK_RATE:
- case WCD938X_DIGITAL_CDC_RST_CTL:
- case WCD938X_DIGITAL_TOP_CLK_CFG:
- case WCD938X_DIGITAL_CDC_ANA_CLK_CTL:
- case WCD938X_DIGITAL_CDC_DIG_CLK_CTL:
- case WCD938X_DIGITAL_SWR_RST_EN:
- case WCD938X_DIGITAL_CDC_PATH_MODE:
- case WCD938X_DIGITAL_CDC_RX_RST:
- case WCD938X_DIGITAL_CDC_RX0_CTL:
- case WCD938X_DIGITAL_CDC_RX1_CTL:
- case WCD938X_DIGITAL_CDC_RX2_CTL:
- case WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1:
- case WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3:
- case WCD938X_DIGITAL_CDC_COMP_CTL_0:
- case WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A1_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A1_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A2_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A2_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A3_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A3_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A4_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A4_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A5_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A5_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A6_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_A7_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_C_0:
- case WCD938X_DIGITAL_CDC_HPH_DSM_C_1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_C_2:
- case WCD938X_DIGITAL_CDC_HPH_DSM_C_3:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R1:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R2:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R3:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R4:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R5:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R6:
- case WCD938X_DIGITAL_CDC_HPH_DSM_R7:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A1_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A1_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A2_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A2_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A3_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A3_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A4_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A4_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A5_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A5_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A6_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_A7_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_C_0:
- case WCD938X_DIGITAL_CDC_AUX_DSM_C_1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_C_2:
- case WCD938X_DIGITAL_CDC_AUX_DSM_C_3:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R1:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R2:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R3:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R4:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R5:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R6:
- case WCD938X_DIGITAL_CDC_AUX_DSM_R7:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2:
- case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0:
- case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1:
- case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2:
- case WCD938X_DIGITAL_CDC_HPH_GAIN_CTL:
- case WCD938X_DIGITAL_CDC_AUX_GAIN_CTL:
- case WCD938X_DIGITAL_CDC_EAR_PATH_CTL:
- case WCD938X_DIGITAL_CDC_SWR_CLH:
- case WCD938X_DIGITAL_SWR_CLH_BYP:
- case WCD938X_DIGITAL_CDC_TX0_CTL:
- case WCD938X_DIGITAL_CDC_TX1_CTL:
- case WCD938X_DIGITAL_CDC_TX2_CTL:
- case WCD938X_DIGITAL_CDC_TX_RST:
- case WCD938X_DIGITAL_CDC_REQ_CTL:
- case WCD938X_DIGITAL_CDC_RST:
- case WCD938X_DIGITAL_CDC_AMIC_CTL:
- case WCD938X_DIGITAL_CDC_DMIC_CTL:
- case WCD938X_DIGITAL_CDC_DMIC1_CTL:
- case WCD938X_DIGITAL_CDC_DMIC2_CTL:
- case WCD938X_DIGITAL_CDC_DMIC3_CTL:
- case WCD938X_DIGITAL_CDC_DMIC4_CTL:
- case WCD938X_DIGITAL_EFUSE_PRG_CTL:
- case WCD938X_DIGITAL_EFUSE_CTL:
- case WCD938X_DIGITAL_CDC_DMIC_RATE_1_2:
- case WCD938X_DIGITAL_CDC_DMIC_RATE_3_4:
- case WCD938X_DIGITAL_PDM_WD_CTL0:
- case WCD938X_DIGITAL_PDM_WD_CTL1:
- case WCD938X_DIGITAL_PDM_WD_CTL2:
- case WCD938X_DIGITAL_INTR_MODE:
- case WCD938X_DIGITAL_INTR_MASK_0:
- case WCD938X_DIGITAL_INTR_MASK_1:
- case WCD938X_DIGITAL_INTR_MASK_2:
- case WCD938X_DIGITAL_INTR_CLEAR_0:
- case WCD938X_DIGITAL_INTR_CLEAR_1:
- case WCD938X_DIGITAL_INTR_CLEAR_2:
- case WCD938X_DIGITAL_INTR_LEVEL_0:
- case WCD938X_DIGITAL_INTR_LEVEL_1:
- case WCD938X_DIGITAL_INTR_LEVEL_2:
- case WCD938X_DIGITAL_INTR_SET_0:
- case WCD938X_DIGITAL_INTR_SET_1:
- case WCD938X_DIGITAL_INTR_SET_2:
- case WCD938X_DIGITAL_INTR_TEST_0:
- case WCD938X_DIGITAL_INTR_TEST_1:
- case WCD938X_DIGITAL_INTR_TEST_2:
- case WCD938X_DIGITAL_TX_MODE_DBG_EN:
- case WCD938X_DIGITAL_TX_MODE_DBG_0_1:
- case WCD938X_DIGITAL_TX_MODE_DBG_2_3:
- case WCD938X_DIGITAL_LB_IN_SEL_CTL:
- case WCD938X_DIGITAL_LOOP_BACK_MODE:
- case WCD938X_DIGITAL_SWR_DAC_TEST:
- case WCD938X_DIGITAL_SWR_HM_TEST_RX_0:
- case WCD938X_DIGITAL_SWR_HM_TEST_TX_0:
- case WCD938X_DIGITAL_SWR_HM_TEST_RX_1:
- case WCD938X_DIGITAL_SWR_HM_TEST_TX_1:
- case WCD938X_DIGITAL_SWR_HM_TEST_TX_2:
- case WCD938X_DIGITAL_PAD_CTL_SWR_0:
- case WCD938X_DIGITAL_PAD_CTL_SWR_1:
- case WCD938X_DIGITAL_I2C_CTL:
- case WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE:
- case WCD938X_DIGITAL_EFUSE_TEST_CTL_0:
- case WCD938X_DIGITAL_EFUSE_TEST_CTL_1:
- case WCD938X_DIGITAL_PAD_CTL_PDM_RX0:
- case WCD938X_DIGITAL_PAD_CTL_PDM_RX1:
- case WCD938X_DIGITAL_PAD_CTL_PDM_TX0:
- case WCD938X_DIGITAL_PAD_CTL_PDM_TX1:
- case WCD938X_DIGITAL_PAD_CTL_PDM_TX2:
- case WCD938X_DIGITAL_PAD_INP_DIS_0:
- case WCD938X_DIGITAL_PAD_INP_DIS_1:
- case WCD938X_DIGITAL_DRIVE_STRENGTH_0:
- case WCD938X_DIGITAL_DRIVE_STRENGTH_1:
- case WCD938X_DIGITAL_DRIVE_STRENGTH_2:
- case WCD938X_DIGITAL_RX_DATA_EDGE_CTL:
- case WCD938X_DIGITAL_TX_DATA_EDGE_CTL:
- case WCD938X_DIGITAL_GPIO_MODE:
- case WCD938X_DIGITAL_PIN_CTL_OE:
- case WCD938X_DIGITAL_PIN_CTL_DATA_0:
- case WCD938X_DIGITAL_PIN_CTL_DATA_1:
- case WCD938X_DIGITAL_DIG_DEBUG_CTL:
- case WCD938X_DIGITAL_DIG_DEBUG_EN:
- case WCD938X_DIGITAL_ANA_CSR_DBG_ADD:
- case WCD938X_DIGITAL_ANA_CSR_DBG_CTL:
- case WCD938X_DIGITAL_SSP_DBG:
- case WCD938X_DIGITAL_SPARE_0:
- case WCD938X_DIGITAL_SPARE_1:
- case WCD938X_DIGITAL_SPARE_2:
- case WCD938X_DIGITAL_TX_REQ_FB_CTL_0:
- case WCD938X_DIGITAL_TX_REQ_FB_CTL_1:
- case WCD938X_DIGITAL_TX_REQ_FB_CTL_2:
- case WCD938X_DIGITAL_TX_REQ_FB_CTL_3:
- case WCD938X_DIGITAL_TX_REQ_FB_CTL_4:
- case WCD938X_DIGITAL_DEM_BYPASS_DATA0:
- case WCD938X_DIGITAL_DEM_BYPASS_DATA1:
- case WCD938X_DIGITAL_DEM_BYPASS_DATA2:
- case WCD938X_DIGITAL_DEM_BYPASS_DATA3:
- return true;
- }
-
- return false;
-}
-
-static bool wcd938x_readonly_register(struct device *dev, unsigned int reg)
-{
- switch (reg) {
- case WCD938X_ANA_MBHC_RESULT_1:
- case WCD938X_ANA_MBHC_RESULT_2:
- case WCD938X_ANA_MBHC_RESULT_3:
- case WCD938X_MBHC_MOISTURE_DET_FSM_STATUS:
- case WCD938X_TX_1_2_SAR2_ERR:
- case WCD938X_TX_1_2_SAR1_ERR:
- case WCD938X_TX_3_4_SAR4_ERR:
- case WCD938X_TX_3_4_SAR3_ERR:
- case WCD938X_HPH_L_STATUS:
- case WCD938X_HPH_R_STATUS:
- case WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS:
- case WCD938X_EAR_STATUS_REG_1:
- case WCD938X_EAR_STATUS_REG_2:
- case WCD938X_MBHC_NEW_FSM_STATUS:
- case WCD938X_MBHC_NEW_ADC_RESULT:
- case WCD938X_DIE_CRACK_DIE_CRK_DET_OUT:
- case WCD938X_AUX_INT_STATUS_REG:
- case WCD938X_LDORXTX_INT_STATUS:
- case WCD938X_DIGITAL_CHIP_ID0:
- case WCD938X_DIGITAL_CHIP_ID1:
- case WCD938X_DIGITAL_CHIP_ID2:
- case WCD938X_DIGITAL_CHIP_ID3:
- case WCD938X_DIGITAL_INTR_STATUS_0:
- case WCD938X_DIGITAL_INTR_STATUS_1:
- case WCD938X_DIGITAL_INTR_STATUS_2:
- case WCD938X_DIGITAL_INTR_CLEAR_0:
- case WCD938X_DIGITAL_INTR_CLEAR_1:
- case WCD938X_DIGITAL_INTR_CLEAR_2:
- case WCD938X_DIGITAL_SWR_HM_TEST_0:
- case WCD938X_DIGITAL_SWR_HM_TEST_1:
- case WCD938X_DIGITAL_EFUSE_T_DATA_0:
- case WCD938X_DIGITAL_EFUSE_T_DATA_1:
- case WCD938X_DIGITAL_PIN_STATUS_0:
- case WCD938X_DIGITAL_PIN_STATUS_1:
- case WCD938X_DIGITAL_MODE_STATUS_0:
- case WCD938X_DIGITAL_MODE_STATUS_1:
- case WCD938X_DIGITAL_EFUSE_REG_0:
- case WCD938X_DIGITAL_EFUSE_REG_1:
- case WCD938X_DIGITAL_EFUSE_REG_2:
- case WCD938X_DIGITAL_EFUSE_REG_3:
- case WCD938X_DIGITAL_EFUSE_REG_4:
- case WCD938X_DIGITAL_EFUSE_REG_5:
- case WCD938X_DIGITAL_EFUSE_REG_6:
- case WCD938X_DIGITAL_EFUSE_REG_7:
- case WCD938X_DIGITAL_EFUSE_REG_8:
- case WCD938X_DIGITAL_EFUSE_REG_9:
- case WCD938X_DIGITAL_EFUSE_REG_10:
- case WCD938X_DIGITAL_EFUSE_REG_11:
- case WCD938X_DIGITAL_EFUSE_REG_12:
- case WCD938X_DIGITAL_EFUSE_REG_13:
- case WCD938X_DIGITAL_EFUSE_REG_14:
- case WCD938X_DIGITAL_EFUSE_REG_15:
- case WCD938X_DIGITAL_EFUSE_REG_16:
- case WCD938X_DIGITAL_EFUSE_REG_17:
- case WCD938X_DIGITAL_EFUSE_REG_18:
- case WCD938X_DIGITAL_EFUSE_REG_19:
- case WCD938X_DIGITAL_EFUSE_REG_20:
- case WCD938X_DIGITAL_EFUSE_REG_21:
- case WCD938X_DIGITAL_EFUSE_REG_22:
- case WCD938X_DIGITAL_EFUSE_REG_23:
- case WCD938X_DIGITAL_EFUSE_REG_24:
- case WCD938X_DIGITAL_EFUSE_REG_25:
- case WCD938X_DIGITAL_EFUSE_REG_26:
- case WCD938X_DIGITAL_EFUSE_REG_27:
- case WCD938X_DIGITAL_EFUSE_REG_28:
- case WCD938X_DIGITAL_EFUSE_REG_29:
- case WCD938X_DIGITAL_EFUSE_REG_30:
- case WCD938X_DIGITAL_EFUSE_REG_31:
- return true;
- }
- return false;
-}
-
-static bool wcd938x_readable_register(struct device *dev, unsigned int reg)
-{
- bool ret;
-
- ret = wcd938x_readonly_register(dev, reg);
- if (!ret)
- return wcd938x_rdwr_register(dev, reg);
-
- return ret;
-}
-
-static bool wcd938x_writeable_register(struct device *dev, unsigned int reg)
-{
- return wcd938x_rdwr_register(dev, reg);
-}
-
-static bool wcd938x_volatile_register(struct device *dev, unsigned int reg)
-{
- if (reg <= WCD938X_BASE_ADDRESS)
- return false;
-
- if (reg == WCD938X_DIGITAL_SWR_TX_CLK_RATE)
- return true;
-
- if (wcd938x_readonly_register(dev, reg))
- return true;
-
- return false;
-}
-
-static struct regmap_config wcd938x_regmap_config = {
- .name = "wcd938x_csr",
- .reg_bits = 32,
- .val_bits = 8,
- .cache_type = REGCACHE_RBTREE,
- .reg_defaults = wcd938x_defaults,
- .num_reg_defaults = ARRAY_SIZE(wcd938x_defaults),
- .max_register = WCD938X_MAX_REGISTER,
- .readable_reg = wcd938x_readable_register,
- .writeable_reg = wcd938x_writeable_register,
- .volatile_reg = wcd938x_volatile_register,
- .can_multi_write = true,
-};
-
static const struct regmap_irq wcd938x_irqs[WCD938X_NUM_IRQS] = {
REGMAP_IRQ_REG(WCD938X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
REGMAP_IRQ_REG(WCD938X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
@@ -4405,10 +3410,10 @@ static int wcd938x_bind(struct device *dev)
return -EINVAL;
}
- wcd938x->regmap = devm_regmap_init_sdw(wcd938x->tx_sdw_dev, &wcd938x_regmap_config);
- if (IS_ERR(wcd938x->regmap)) {
- dev_err(dev, "%s: tx csr regmap not found\n", __func__);
- return PTR_ERR(wcd938x->regmap);
+ wcd938x->regmap = dev_get_regmap(&wcd938x->tx_sdw_dev->dev, NULL);
+ if (!wcd938x->regmap) {
+ dev_err(dev, "could not get TX device regmap\n");
+ return -EINVAL;
}
ret = wcd938x_irq_init(wcd938x, dev);
diff --git a/sound/soc/codecs/wcd938x.h b/sound/soc/codecs/wcd938x.h
index ea82039e7843..74b1498fec38 100644
--- a/sound/soc/codecs/wcd938x.h
+++ b/sound/soc/codecs/wcd938x.h
@@ -663,6 +663,7 @@ struct wcd938x_sdw_priv {
bool is_tx;
struct wcd938x_priv *wcd938x;
struct irq_domain *slave_irq;
+ struct regmap *regmap;
};
#if IS_ENABLED(CONFIG_SND_SOC_WCD938X_SDW)
diff --git a/sound/soc/intel/common/soc-acpi-intel-byt-match.c b/sound/soc/intel/common/soc-acpi-intel-byt-match.c
index db5a92b9875a..87c44f284971 100644
--- a/sound/soc/intel/common/soc-acpi-intel-byt-match.c
+++ b/sound/soc/intel/common/soc-acpi-intel-byt-match.c
@@ -124,7 +124,7 @@ static const struct snd_soc_acpi_codecs rt5640_comp_ids = {
};
static const struct snd_soc_acpi_codecs wm5102_comp_ids = {
- .num_codecs = 2,
+ .num_codecs = 3,
.codecs = { "10WM5102", "WM510204", "WM510205"},
};
diff --git a/sound/soc/intel/common/soc-acpi-intel-cht-match.c b/sound/soc/intel/common/soc-acpi-intel-cht-match.c
index 6beb00858c33..cdcbf04b8832 100644
--- a/sound/soc/intel/common/soc-acpi-intel-cht-match.c
+++ b/sound/soc/intel/common/soc-acpi-intel-cht-match.c
@@ -50,6 +50,31 @@ static struct snd_soc_acpi_mach *cht_quirk(void *arg)
return mach;
}
+/*
+ * Some tablets with Android factory OS have buggy DSDTs with an ESSX8316 device
+ * in the ACPI tables. While they are not using an ESS8316 codec. These DSDTs
+ * also have an ACPI device for the correct codec, ignore the ESSX8316.
+ */
+static const struct dmi_system_id cht_ess8316_not_present_table[] = {
+ {
+ /* Nextbook Ares 8A */
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "CherryTrail"),
+ DMI_MATCH(DMI_BIOS_VERSION, "M882"),
+ },
+ },
+ { }
+};
+
+static struct snd_soc_acpi_mach *cht_ess8316_quirk(void *arg)
+{
+ if (dmi_check_system(cht_ess8316_not_present_table))
+ return NULL;
+
+ return arg;
+}
+
static const struct snd_soc_acpi_codecs rt5640_comp_ids = {
.num_codecs = 2,
.codecs = { "10EC5640", "10EC3276" },
@@ -113,6 +138,7 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cherrytrail_machines[] = {
.drv_name = "bytcht_es8316",
.fw_filename = "intel/fw_sst_22a8.bin",
.board = "bytcht_es8316",
+ .machine_quirk = cht_ess8316_quirk,
.sof_tplg_filename = "sof-cht-es8316.tplg",
},
/* some CHT-T platforms rely on RT5640, use Baytrail machine driver */
diff --git a/sound/usb/caiaq/input.c b/sound/usb/caiaq/input.c
index 1e2cf2f08eec..84f26dce7f5d 100644
--- a/sound/usb/caiaq/input.c
+++ b/sound/usb/caiaq/input.c
@@ -804,6 +804,7 @@ int snd_usb_caiaq_input_init(struct snd_usb_caiaqdev *cdev)
default:
/* no input methods supported on this device */
+ ret = -EINVAL;
goto exit_free_idev;
}
diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h
index 271884e35003..efb4a3311cc5 100644
--- a/sound/usb/quirks-table.h
+++ b/sound/usb/quirks-table.h
@@ -3884,6 +3884,64 @@ YAMAHA_DEVICE(0x7010, "UB99"),
}
},
+{
+ /*
+ * PIONEER DJ DDJ-800
+ * PCM is 6 channels out, 6 channels in @ 44.1 fixed
+ * The Feedback for the output is the input
+ */
+ USB_DEVICE_VENDOR_SPEC(0x2b73, 0x0029),
+ .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) {
+ .ifnum = QUIRK_ANY_INTERFACE,
+ .type = QUIRK_COMPOSITE,
+ .data = (const struct snd_usb_audio_quirk[]) {
+ {
+ .ifnum = 0,
+ .type = QUIRK_AUDIO_FIXED_ENDPOINT,
+ .data = &(const struct audioformat) {
+ .formats = SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels = 6,
+ .iface = 0,
+ .altsetting = 1,
+ .altset_idx = 1,
+ .endpoint = 0x01,
+ .ep_attr = USB_ENDPOINT_XFER_ISOC|
+ USB_ENDPOINT_SYNC_ASYNC,
+ .rates = SNDRV_PCM_RATE_44100,
+ .rate_min = 44100,
+ .rate_max = 44100,
+ .nr_rates = 1,
+ .rate_table = (unsigned int[]) { 44100 }
+ }
+ },
+ {
+ .ifnum = 0,
+ .type = QUIRK_AUDIO_FIXED_ENDPOINT,
+ .data = &(const struct audioformat) {
+ .formats = SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels = 6,
+ .iface = 0,
+ .altsetting = 1,
+ .altset_idx = 1,
+ .endpoint = 0x82,
+ .ep_idx = 1,
+ .ep_attr = USB_ENDPOINT_XFER_ISOC|
+ USB_ENDPOINT_SYNC_ASYNC|
+ USB_ENDPOINT_USAGE_IMPLICIT_FB,
+ .rates = SNDRV_PCM_RATE_44100,
+ .rate_min = 44100,
+ .rate_max = 44100,
+ .nr_rates = 1,
+ .rate_table = (unsigned int[]) { 44100 }
+ }
+ },
+ {
+ .ifnum = -1
+ }
+ }
+ }
+},
+
/*
* MacroSilicon MS2100/MS2106 based AV capture cards
*