diff options
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm-nsp.dtsi | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 6a40ed7d0502..c3bf7d23f136 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -57,7 +57,7 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <0xffff042c>; + secondary-boot-reg = <0xffff0fec>; reg = <0x1>; }; }; @@ -192,6 +192,23 @@ status = "disabled"; }; + dma@20000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20000 0x1000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&iprocslow>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + nand: nand@26000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x026000 0x600>, @@ -337,6 +354,18 @@ ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; status = "disabled"; + + msi-parent = <&msi0>; + msi0: msi@18012000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>, + <GIC_SPI 128 IRQ_TYPE_NONE>, + <GIC_SPI 129 IRQ_TYPE_NONE>, + <GIC_SPI 130 IRQ_TYPE_NONE>; + brcm,pcie-msi-inten; + }; }; pcie1: pcie@18013000 { @@ -361,6 +390,18 @@ ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; status = "disabled"; + + msi-parent = <&msi1>; + msi1: msi@18013000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 133 IRQ_TYPE_NONE>, + <GIC_SPI 134 IRQ_TYPE_NONE>, + <GIC_SPI 135 IRQ_TYPE_NONE>, + <GIC_SPI 136 IRQ_TYPE_NONE>; + brcm,pcie-msi-inten; + }; }; pcie2: pcie@18014000 { @@ -385,5 +426,17 @@ ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>; status = "disabled"; + + msi-parent = <&msi2>; + msi2: msi@18014000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>, + <GIC_SPI 140 IRQ_TYPE_NONE>, + <GIC_SPI 141 IRQ_TYPE_NONE>, + <GIC_SPI 142 IRQ_TYPE_NONE>; + brcm,pcie-msi-inten; + }; }; }; |