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path: root/arch/riscv/kernel/cpu.c
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* RISC-V: Remove unsupported isa string info printAtish Patra2019-10-281-42/+3
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-051-9/+1
* RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2019-04-301-2/+1
* RISC-V: Remove NR_CPUs check during hartid search from DTAtish Patra2019-03-041-4/+0
* riscv: treat cpu devicetree nodes without status as enabledJohan Hovold2019-02-111-7/+3
* riscv: fix riscv_of_processor_hartid() commentJohan Hovold2019-02-111-9/+9
* riscv: add missing newlines to printk messagesJohan Hovold2019-02-111-1/+1
* RISC-V: Fix of_node_* refcountAtish Patra2018-12-211-0/+1
* RISC-V: recognize S/U mode bits in print_isaPatrick Stählin2018-11-201-3/+6
* RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfoAnup Patel2018-10-221-4/+6
* RISC-V: Use Linux logical CPU number instead of hartidAtish Patra2018-10-221-3/+5
* RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt2018-10-221-2/+5
* RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt2018-10-221-7/+61
* RISC-V: Init and Halt CodePalmer Dabbelt2017-09-261-0/+108
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