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* USB2 ChipIdea USB controller for ci13xxx
Required properties:
- compatible: should be one of:
"fsl,imx27-usb"
"lsi,zevio-usb"
"qcom,ci-hdrc"
"chipidea,usb2"
- reg: base address and length of the registers
- interrupts: interrupt for the USB controller
Recommended properies:
- phy_type: the type of the phy connected to the core. Should be one
of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
property the PORTSC register won't be touched.
- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
Deprecated properties:
- usb-phy: phandle for the PHY device. Use "phys" instead.
- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
Optional properties:
- clocks: reference to the USB clock
- phys: reference to the USB PHY
- phy-names: should be "usb-phy"
- vbus-supply: reference to the VBUS regulator
- maximum-speed: limit the maximum connection speed to "full-speed".
- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
- fsl,usbmisc: (FSL only) phandler of non-core register device, with one
argument that indicate usb controller index
- disable-over-current: (FSL only) disable over current detect
- external-vbus-divider: (FSL only) enables off-chip resistor divider for Vbus
- itc-setting: interrupt threshold control register control, the setting
should be aligned with ITC bits at register USBCMD.
- ahb-burst-config: it is vendor dependent, the required value should be
aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
property is used to change AHB burst configuration, check the chipidea
spec for meaning of each value. If this property is not existed, it
will use the reset value.
Example:
usb@f7ed0000 {
compatible = "chipidea,usb2";
reg = <0xf7ed0000 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB0>;
phys = <&usb_phy0>;
phy-names = "usb-phy";
vbus-supply = <®_usb0_vbus>;
gadget-itc-setting = <0x4>; /* 4 micro-frames */
/* Incremental burst of unspecified length */
ahb-burst-config = <0x0>;
};
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