1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
|
/*
* Interface to the 93C46/56 serial EEPROM that is used to store BIOS
* settings for the aic7xxx based adaptec SCSI controllers. It can
* also be used for 93C26 and 93C06 serial EEPROMS.
*
* Copyright (c) 1994, 1995, 2000 Justin T. Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.h#12 $
*
* $FreeBSD$
*/
#ifndef _AIC7XXX_93CX6_H_
#define _AIC7XXX_93CX6_H_
typedef enum {
C46 = 6,
C56_66 = 8
} seeprom_chip_t;
struct seeprom_descriptor {
struct ahc_softc *sd_ahc;
u_int sd_control_offset;
u_int sd_status_offset;
u_int sd_dataout_offset;
seeprom_chip_t sd_chip;
uint16_t sd_MS;
uint16_t sd_RDY;
uint16_t sd_CS;
uint16_t sd_CK;
uint16_t sd_DO;
uint16_t sd_DI;
};
/*
* This function will read count 16-bit words from the serial EEPROM and
* return their value in buf. The port address of the aic7xxx serial EEPROM
* control register is passed in as offset. The following parameters are
* also passed in:
*
* CS - Chip select
* CK - Clock
* DO - Data out
* DI - Data in
* RDY - SEEPROM ready
* MS - Memory port mode select
*
* A failed read attempt returns 0, and a successful read returns 1.
*/
#define SEEPROM_INB(sd) \
ahc_inb(sd->sd_ahc, sd->sd_control_offset)
#define SEEPROM_OUTB(sd, value) \
do { \
ahc_outb(sd->sd_ahc, sd->sd_control_offset, value); \
ahc_flush_device_writes(sd->sd_ahc); \
} while(0)
#define SEEPROM_STATUS_INB(sd) \
ahc_inb(sd->sd_ahc, sd->sd_status_offset)
#define SEEPROM_DATA_INB(sd) \
ahc_inb(sd->sd_ahc, sd->sd_dataout_offset)
int ahc_read_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
u_int start_addr, u_int count);
int ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
u_int start_addr, u_int count);
int ahc_verify_cksum(struct seeprom_config *sc);
#endif /* _AIC7XXX_93CX6_H_ */
|