diff options
author | Luís Marques <luismarques@lowrisc.org> | 2022-04-07 12:00:41 +0100 |
---|---|---|
committer | Tom Stellard <tstellar@redhat.com> | 2022-04-25 20:44:44 -0700 |
commit | 0e27d08cdeb338766a477fba071b3df7a06ea6e2 (patch) | |
tree | c095e54092f23983b8597c17f7b5b59b9c43ce41 | |
parent | a36801750327d05d5f8a19aec33819ae3f8f5e35 (diff) | |
download | llvmorg-14.0.2.tar.gz |
[RISCV] Fix crash for section alignment with .option norvcllvmorg-14.0.2
The existing code wasn't getting the subtarget info from the fragment,
so the current status of RVC would be ignored. This would cause a crash
for the new test case when the target then reported it couldn't write
the requested number of code alignment bytes.
Differential Revision: https://reviews.llvm.org/D122236
(cherry picked from commit d09d297c5d28bd0af4dd8bf3ca66d8dbbd196d9d)
-rw-r--r-- | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 8 | ||||
-rw-r--r-- | llvm/test/MC/RISCV/align-option-relax.s | 8 | ||||
-rw-r--r-- | llvm/test/MC/RISCV/align.s | 8 |
3 files changed, 21 insertions, 3 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 514789b3f645..4b940093482f 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -583,10 +583,11 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign( const MCAlignFragment &AF, unsigned &Size) { // Calculate Nops Size only when linker relaxation enabled. - if (!STI.getFeatureBits()[RISCV::FeatureRelax]) + const MCSubtargetInfo *STI = AF.getSubtargetInfo(); + if (!STI->getFeatureBits()[RISCV::FeatureRelax]) return false; - bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; + bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC]; unsigned MinNopLen = HasStdExtC ? 2 : 4; if (AF.getAlignment() <= MinNopLen) { @@ -606,7 +607,8 @@ bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm, const MCAsmLayout &Layout, MCAlignFragment &AF) { // Insert the fixup only when linker relaxation enabled. - if (!STI.getFeatureBits()[RISCV::FeatureRelax]) + const MCSubtargetInfo *STI = AF.getSubtargetInfo(); + if (!STI->getFeatureBits()[RISCV::FeatureRelax]) return false; // Calculate total Nops we need to insert. If there are none to insert diff --git a/llvm/test/MC/RISCV/align-option-relax.s b/llvm/test/MC/RISCV/align-option-relax.s new file mode 100644 index 000000000000..890e1e72d770 --- /dev/null +++ b/llvm/test/MC/RISCV/align-option-relax.s @@ -0,0 +1,8 @@ +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \ +# RUN: | llvm-readobj -r - | FileCheck %s + +# Check that .option relax overrides -mno-relax and enables R_RISCV_ALIGN +# relocations. +# CHECK: R_RISCV_ALIGN + .option relax + .align 4 diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s index 804effb6600b..75ea8eb77bbd 100644 --- a/llvm/test/MC/RISCV/align.s +++ b/llvm/test/MC/RISCV/align.s @@ -112,3 +112,11 @@ data1: # C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN data2: .word 9 +# Check that the initial alignment is properly handled when using .option to +# disable the C extension. This used to crash. +# C-EXT-RELAX-INST: <.text2>: +# C-EXT-RELAX-INST-NEXT: add a0, a0, a1 + .section .text2, "x" + .option norvc + .balign 4 + add a0, a0, a1 |