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author | Valentin Clement <clementval@gmail.com> | 2023-05-10 08:35:06 -0700 |
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committer | Valentin Clement <clementval@gmail.com> | 2023-05-10 08:38:03 -0700 |
commit | 1e463942f4a3f38998f28c5d1749ece1047a391f (patch) | |
tree | 029b854b9f0b6f32f6261eaa3ce8a1e8e40ef53f | |
parent | 3484745a5f41c9282712c575229a92b658b23dd1 (diff) | |
download | llvm-1e463942f4a3f38998f28c5d1749ece1047a391f.tar.gz |
[mlir][openacc] Cleanup acc.kernels from old data clause operands
Remove old clause operands from acc.kernels operation since
the new dataOperands is now in place.
private and firstprivate will receive some redesign but are
not part of the new dataOperands.
Depends on D150224
Reviewed By: vzakhari
Differential Revision: https://reviews.llvm.org/D150225
-rw-r--r-- | flang/lib/Lower/OpenACC.cpp | 5 | ||||
-rw-r--r-- | mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td | 24 | ||||
-rw-r--r-- | mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 7 | ||||
-rw-r--r-- | mlir/test/Dialect/OpenACC/ops.mlir | 28 |
4 files changed, 2 insertions, 62 deletions
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp index 1fc1c0bc825c..fb6b71466021 100644 --- a/flang/lib/Lower/OpenACC.cpp +++ b/flang/lib/Lower/OpenACC.cpp @@ -997,11 +997,8 @@ createComputeOp(Fortran::lower::AbstractConverter &converter, } addOperand(operands, operandSegments, ifCond); addOperand(operands, operandSegments, selfCond); - if constexpr (!std::is_same_v<Op, mlir::acc::KernelsOp>) - addOperands(operands, operandSegments, reductionOperands); - if constexpr (std::is_same_v<Op, mlir::acc::KernelsOp>) - operandSegments.append({0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}); if constexpr (!std::is_same_v<Op, mlir::acc::KernelsOp>) { + addOperands(operands, operandSegments, reductionOperands); addOperands(operands, operandSegments, privateOperands); addOperands(operands, operandSegments, firstprivateOperands); } diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td index 76818639512e..1479ff10356c 100644 --- a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td +++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td @@ -550,17 +550,6 @@ def OpenACC_KernelsOp : OpenACC_Op<"kernels", Optional<I1>:$ifCond, Optional<I1>:$selfCond, UnitAttr:$selfAttr, - Variadic<AnyType>:$copyOperands, - Variadic<AnyType>:$copyinOperands, - Variadic<AnyType>:$copyinReadonlyOperands, - Variadic<AnyType>:$copyoutOperands, - Variadic<AnyType>:$copyoutZeroOperands, - Variadic<AnyType>:$createOperands, - Variadic<AnyType>:$createZeroOperands, - Variadic<AnyType>:$noCreateOperands, - Variadic<AnyType>:$presentOperands, - Variadic<AnyType>:$devicePtrOperands, - Variadic<AnyType>:$attachOperands, Variadic<OpenACC_PointerLikeTypeInterface>:$dataClauseOperands, OptionalAttr<DefaultValueAttr>:$defaultAttr); @@ -577,22 +566,9 @@ def OpenACC_KernelsOp : OpenACC_Op<"kernels", let assemblyFormat = [{ oilist( `dataOperands` `(` $dataClauseOperands `:` type($dataClauseOperands) `)` - | `attach` `(` $attachOperands `:` type($attachOperands) `)` | `async` `(` $async `:` type($async) `)` - | `copy` `(` $copyOperands `:` type($copyOperands) `)` - | `copyin` `(` $copyinOperands `:` type($copyinOperands) `)` - | `copyin_readonly` `(` $copyinReadonlyOperands `:` - type($copyinReadonlyOperands) `)` - | `copyout` `(` $copyoutOperands `:` type($copyoutOperands) `)` - | `copyout_zero` `(` $copyoutZeroOperands `:` - type($copyoutZeroOperands) `)` - | `create` `(` $createOperands `:` type($createOperands) `)` - | `create_zero` `(` $createZeroOperands `:` type($createZeroOperands) `)` - | `deviceptr` `(` $devicePtrOperands `:` type($devicePtrOperands) `)` - | `no_create` `(` $noCreateOperands `:` type($noCreateOperands) `)` | `num_gangs` `(` $numGangs `:` type($numGangs) `)` | `num_workers` `(` $numWorkers `:` type($numWorkers) `)` - | `present` `(` $presentOperands `:` type($presentOperands) `)` | `vector_length` `(` $vectorLength `:` type($vectorLength) `)` | `wait` `(` $waitOperands `:` type($waitOperands) `)` | `self` `(` $selfCond `)` diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp index 5760abd60a29..f92b04010933 100644 --- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp +++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp @@ -345,12 +345,7 @@ LogicalResult acc::SerialOp::verify() { //===----------------------------------------------------------------------===// unsigned KernelsOp::getNumDataOperands() { - return getCopyOperands().size() + getCopyinOperands().size() + - getCopyinReadonlyOperands().size() + getCopyoutOperands().size() + - getCopyoutZeroOperands().size() + getCreateOperands().size() + - getCreateZeroOperands().size() + getNoCreateOperands().size() + - getPresentOperands().size() + getDevicePtrOperands().size() + - getAttachOperands().size() + getDataClauseOperands().size(); + return getDataClauseOperands().size(); } Value KernelsOp::getDataOperand(unsigned i) { diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir index b1044f80717b..7260c05d3aae 100644 --- a/mlir/test/Dialect/OpenACC/ops.mlir +++ b/mlir/test/Dialect/OpenACC/ops.mlir @@ -553,20 +553,6 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10 } acc.kernels wait(%i64value, %i32value, %idxValue : i64, i32, index) { } - acc.kernels copyin(%a, %b : memref<10xf32>, memref<10xf32>) { - } - acc.kernels copyin_readonly(%a, %b : memref<10xf32>, memref<10xf32>) { - } - acc.kernels copyin(%a: memref<10xf32>) copyout_zero(%b, %c : memref<10xf32>, memref<10x10xf32>) { - } - acc.kernels copyout(%b, %c : memref<10xf32>, memref<10x10xf32>) create(%a: memref<10xf32>) { - } - acc.kernels copyout_zero(%b, %c : memref<10xf32>, memref<10x10xf32>) create_zero(%a: memref<10xf32>) { - } - acc.kernels no_create(%a: memref<10xf32>) present(%b, %c : memref<10xf32>, memref<10x10xf32>) { - } - acc.kernels deviceptr(%a: memref<10xf32>) attach(%b, %c : memref<10xf32>, memref<10x10xf32>) { - } acc.kernels { } attributes {defaultAttr = #acc<defaultvalue none>} acc.kernels { @@ -601,20 +587,6 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10 // CHECK-NEXT: } // CHECK: acc.kernels wait([[I64VALUE]], [[I32VALUE]], [[IDXVALUE]] : i64, i32, index) { // CHECK-NEXT: } -// CHECK: acc.kernels copyin([[ARGA]], [[ARGB]] : memref<10xf32>, memref<10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels copyin_readonly([[ARGA]], [[ARGB]] : memref<10xf32>, memref<10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels copyin([[ARGA]] : memref<10xf32>) copyout_zero([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels copyout([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) create([[ARGA]] : memref<10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels copyout_zero([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) create_zero([[ARGA]] : memref<10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels no_create([[ARGA]] : memref<10xf32>) present([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) { -// CHECK-NEXT: } -// CHECK: acc.kernels attach([[ARGB]], [[ARGC]] : memref<10xf32>, memref<10x10xf32>) deviceptr([[ARGA]] : memref<10xf32>) { -// CHECK-NEXT: } // CHECK: acc.kernels { // CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>} // CHECK: acc.kernels { |