[BOLT][AArch64] Handle adrp+ld64 linker relaxations

Linker might relax adrp + ldr got address loading to adrp + add for
local non-preemptible symbols (e.g. hidden/protected symbols in
executable). As usually linker doesn't change relocations properly after
relaxation, so we have to handle such cases by ourselves. To do that
during relocations reading we change LD64 reloc to ADD if instruction
mismatch found and introduce FixRelaxationPass that searches for ADRP+ADD
pairs and after performing some checks we're replacing ADRP target symbol
to already fixed ADDs one.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D138097

2 files changed, 211 insertions, 0 deletions

diff --git a/bolt/test/AArch64/Inputs/got-ld64-relaxation.yaml b/bolt/test/AArch64/Inputs/got-ld64-relaxation.yaml
new file mode 100644
index 000000000000..76b706fa9a83
--- /dev/null
+++ b/bolt/test/AArch64/Inputs/got-ld64-relaxation.yaml
@@ -0,0 +1,202 @@
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diff --git a/bolt/test/AArch64/got-ld64-relaxation.test b/bolt/test/AArch64/got-ld64-relaxation.test
new file mode 100644
index 000000000000..74d876b647e3
--- /dev/null
+++ b/bolt/test/AArch64/got-ld64-relaxation.test
@@ -0,0 +1,9 @@
+// This test checks that ADR+LDR instruction sequence relaxed by the linker
+// to the ADR+ADD sequence is properly reconized and handled by bolt
+
+// RUN: yaml2obj %p/Inputs/got-ld64-relaxation.yaml &> %t.exe
+// RUN: llvm-bolt %t.exe -o /dev/null --print-fix-relaxations \
+// RUN:   --print-only=main | FileCheck %s
+
+// CHECK: adrp x0, foo
+// CHECK-NEXT: add x0, x0, :lo12:foo