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authorsstwcw <f0gukp2nk@protonmail.com>2023-04-16 23:47:55 +0000
committersstwcw <f0gukp2nk@protonmail.com>2023-04-16 23:48:07 +0000
commitb6301a018d585723610c9718b0a4d1bd9e696b17 (patch)
treecdd74786b31b675d1929aa4bc99137171ad6330d /clang/unittests
parent9395cf063a013003704118deccf7633533170a5b (diff)
downloadllvm-b6301a018d585723610c9718b0a4d1bd9e696b17.tar.gz
[clang-format][NFC] Output tokens on test assert
Reviewed By: rymiel Differential Revision: https://reviews.llvm.org/D148482
Diffstat (limited to 'clang/unittests')
-rw-r--r--clang/unittests/Format/TokenAnnotatorTest.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp b/clang/unittests/Format/TokenAnnotatorTest.cpp
index ce37abed595d..c49c4182807e 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -841,7 +841,7 @@ TEST_F(TokenAnnotatorTest, UnderstandsRequiresClausesAndConcepts) {
" [[nodiscard]] constexpr operator T() const { "
"return number_zero_v<T>; }\n"
"};");
- ASSERT_EQ(Tokens.size(), 44u);
+ ASSERT_EQ(Tokens.size(), 44u) << Tokens;
EXPECT_TOKEN(Tokens[13], tok::kw_requires, TT_RequiresClause);
EXPECT_TOKEN(Tokens[14], tok::kw_requires, TT_RequiresExpression);
EXPECT_TOKEN(Tokens[15], tok::l_brace, TT_RequiresExpressionLBrace);
@@ -1605,7 +1605,7 @@ TEST_F(TokenAnnotatorTest, UnderstandsVerilogOperators) {
// Test for block label colons.
Tokens = Annotate("begin : x\n"
"end : x");
- ASSERT_EQ(Tokens.size(), 7u);
+ ASSERT_EQ(Tokens.size(), 7u) << Tokens;
EXPECT_TOKEN(Tokens[1], tok::colon, TT_VerilogBlockLabelColon);
EXPECT_TOKEN(Tokens[4], tok::colon, TT_VerilogBlockLabelColon);
// Test that the dimension colon is annotated correctly.
@@ -1632,15 +1632,15 @@ TEST_F(TokenAnnotatorTest, UnderstandsVerilogOperators) {
EXPECT_TOKEN(Tokens[9], tok::colon, TT_GotoLabelColon);
// Non-blocking assignments.
Tokens = Annotate("a <= b;");
- ASSERT_EQ(Tokens.size(), 5u);
+ ASSERT_EQ(Tokens.size(), 5u) << Tokens;
EXPECT_TOKEN(Tokens[1], tok::lessequal, TT_BinaryOperator);
EXPECT_TOKEN_PRECEDENCE(Tokens[1], prec::Assignment);
Tokens = Annotate("if (a <= b) break;");
- ASSERT_EQ(Tokens.size(), 9u);
+ ASSERT_EQ(Tokens.size(), 9u) << Tokens;
EXPECT_TOKEN(Tokens[3], tok::lessequal, TT_BinaryOperator);
EXPECT_TOKEN_PRECEDENCE(Tokens[3], prec::Relational);
Tokens = Annotate("a <= b <= a;");
- ASSERT_EQ(Tokens.size(), 7u);
+ ASSERT_EQ(Tokens.size(), 7u) << Tokens;
EXPECT_TOKEN(Tokens[1], tok::lessequal, TT_BinaryOperator);
EXPECT_TOKEN_PRECEDENCE(Tokens[1], prec::Assignment);
EXPECT_TOKEN(Tokens[3], tok::lessequal, TT_BinaryOperator);
@@ -1648,12 +1648,12 @@ TEST_F(TokenAnnotatorTest, UnderstandsVerilogOperators) {
// Port lists in module instantiation.
Tokens = Annotate("module_x instance_1(port_1), instance_2(port_2);");
- ASSERT_EQ(Tokens.size(), 12u);
+ ASSERT_EQ(Tokens.size(), 12u) << Tokens;
EXPECT_TOKEN(Tokens[2], tok::l_paren, TT_VerilogInstancePortLParen);
EXPECT_TOKEN(Tokens[7], tok::l_paren, TT_VerilogInstancePortLParen);
Tokens = Annotate("module_x #(parameter) instance_1(port_1), "
"instance_2(port_2);");
- ASSERT_EQ(Tokens.size(), 16u);
+ ASSERT_EQ(Tokens.size(), 16u) << Tokens;
EXPECT_TOKEN(Tokens[2], tok::l_paren, TT_VerilogInstancePortLParen);
EXPECT_TOKEN(Tokens[6], tok::l_paren, TT_VerilogInstancePortLParen);
EXPECT_TOKEN(Tokens[11], tok::l_paren, TT_VerilogInstancePortLParen);