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author | Paul Robinson <paul.robinson@sony.com> | 2018-02-14 17:35:52 +0000 |
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committer | Paul Robinson <paul.robinson@sony.com> | 2018-02-14 17:35:52 +0000 |
commit | bcf26eacc012539a6f88ffb81ec6183a9dc1bd65 (patch) | |
tree | fa532f1366bcfc67f1897aecb60bbe14124fe71d /lib/Target/X86/X86ExpandPseudo.cpp | |
parent | a7c2acc8f19a62cce2061553eebc364163d1d513 (diff) | |
download | llvm-bcf26eacc012539a6f88ffb81ec6183a9dc1bd65.tar.gz |
[DWARF] Fix incorrect prologue end line record.
The prologue-end line record must be emitted after the last
instruction that is part of the function frame setup code and before
the instruction that marks the beginning of the function body.
Patch by Carlos Alberto Enciso!
Differential Revision: https://reviews.llvm.org/D41762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325143 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ExpandPseudo.cpp')
-rw-r--r-- | lib/Target/X86/X86ExpandPseudo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ExpandPseudo.cpp b/lib/Target/X86/X86ExpandPseudo.cpp index ab2ef26d1cc9..5ac20bfe37bf 100644 --- a/lib/Target/X86/X86ExpandPseudo.cpp +++ b/lib/Target/X86/X86ExpandPseudo.cpp @@ -106,7 +106,7 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB, if (Offset) { // Check for possible merge with preceding ADD instruction. Offset += X86FL->mergeSPUpdates(MBB, MBBI, true); - X86FL->emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true); + X86FL->emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue=*/true); } // Jump to label or value in register. @@ -186,7 +186,7 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB, case X86::IRET: { // Adjust stack to erase error code int64_t StackAdj = MBBI->getOperand(0).getImm(); - X86FL->emitSPUpdate(MBB, MBBI, StackAdj, true); + X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, true); // Replace pseudo with machine iret BuildMI(MBB, MBBI, DL, TII->get(STI->is64Bit() ? X86::IRET64 : X86::IRET32)); @@ -210,7 +210,7 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB, // A ret can only handle immediates as big as 2**16-1. If we need to pop // off bytes before the return address, we must do it manually. BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define); - X86FL->emitSPUpdate(MBB, MBBI, StackAdj, /*InEpilogue=*/true); + X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true); BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX); MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RETL)); } |