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authorDaniel Kiss <daniel.kiss@arm.com>2022-05-13 09:12:07 +0200
committerDaniel Kiss <daniel.kiss@arm.com>2022-05-13 10:05:59 +0200
commitf6366ef7f4f3cf1182fd70e0c50a9fa54374b612 (patch)
tree9f64274ab073b29d58db5b4b1f1151925ecc4a3f /libunwind/test
parent094fb13b88b36ecfa475cb877d2c6e9d90b4d1a5 (diff)
downloadllvm-f6366ef7f4f3cf1182fd70e0c50a9fa54374b612.tar.gz
[libunwind][AArch64] Add support for DWARF expression for RA_SIGN_STATE.
Program may set the RA_SIGN_STATE pseudo register by expressions. Libunwind expected only the DW_CFA_AARCH64_negate_ra_state could change the value of the register which leads to runtime errors on PAC enabled systems. In the recent version of the aadwarf64[1] a limitation is added[2] to forbid the mixing the DW_CFA_AARCH64_negate_ra_state with other DWARF Register Rule Instructions. [1] https://github.com/ARM-software/abi-aa/releases/tag/2022Q1 [2] https://github.com/ARM-software/abi-aa/pull/129 Reviewed By: #libunwind, MaskRay Differential Revision: https://reviews.llvm.org/D123692
Diffstat (limited to 'libunwind/test')
-rw-r--r--libunwind/test/aarch64.ra_sign_state.pass.cpp63
1 files changed, 63 insertions, 0 deletions
diff --git a/libunwind/test/aarch64.ra_sign_state.pass.cpp b/libunwind/test/aarch64.ra_sign_state.pass.cpp
new file mode 100644
index 000000000000..1e09c936d664
--- /dev/null
+++ b/libunwind/test/aarch64.ra_sign_state.pass.cpp
@@ -0,0 +1,63 @@
+// -*- C++ -*-
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+// REQUIRES: linux && target={{aarch64-.+}}
+
+// This test ensures the .cfi_negate_ra_state the RA_SIGN_STATE pseudo register
+// could be set directly set by a DWARF expression and the unwinder handles it
+// correctly. The two directives can't be mixed in one CIE/FDE sqeuence.
+
+#include <stdlib.h>
+
+__attribute__((noinline, target("branch-protection=pac-ret+leaf")))
+void bar() {
+ // ".cfi_negate_ra_state" is emitted by the compiler.
+ throw 1;
+}
+
+__attribute__((noinline, target("branch-protection=none")))
+void foo() {
+ // Here a DWARF expression sets RA_SIGN_STATE.
+ // The LR is signed manually and stored on the stack.
+ asm volatile(
+ ".cfi_escape 0x16," // DW_CFA_val_expression
+ "34," // REG_34(RA_SIGN_STATE)
+ "1," // expression_length(1)
+ "0x31\n" // DW_OP_lit1
+ "add sp, sp, 16\n" // Restore SP's value before the stack frame is
+ // created.
+ "paciasp\n" // Sign the LR.
+ "str lr, [sp, -0x8]\n" // Overwrite LR on the stack.
+ "sub sp, sp, 16\n" // Restore SP's value.
+ );
+ bar();
+ _Exit(-1);
+}
+
+__attribute__((noinline, target("branch-protection=pac-ret")))
+void bazz() {
+ // ".cfi_negate_ra_state" is emitted by the compiler.
+ try {
+ foo();
+ } catch (int i) {
+ if (i == 1)
+ throw i;
+ throw 2;
+ }
+}
+
+int main() {
+ try {
+ bazz();
+ } catch (int i) {
+ if (i == 1)
+ _Exit(0);
+ }
+ return -1;
+}