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author | Jacek Caban <jacek@codeweavers.com> | 2023-03-23 13:20:37 +0200 |
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committer | Martin Storsjö <martin@martin.st> | 2023-03-23 13:43:21 +0200 |
commit | a5988034a44d039f95db3067e4ad0dfeeca155c3 (patch) | |
tree | 44ad2d8c1b7e33dd123a5072afc661bab8c7f4e5 /lld/COFF | |
parent | 4fcbf3842007569880fa916831efefda6b1bd032 (diff) | |
download | llvm-a5988034a44d039f95db3067e4ad0dfeeca155c3.tar.gz |
[lld] Fill .text section gaps with INT3 only on x86 targets.
It doesn't make sense on ARM and using default 0 fill is compatible
with MSVC.
(It's more noticeable ARM64EC targets, where additional padding mixed
with alignment is used for entry thunk association, so there are more
gaps).
Reviewed By: mstorsjo
Differential Revision: https://reviews.llvm.org/D145962
Diffstat (limited to 'lld/COFF')
-rw-r--r-- | lld/COFF/Writer.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lld/COFF/Writer.cpp b/lld/COFF/Writer.cpp index 0909b14d8190..603703e65290 100644 --- a/lld/COFF/Writer.cpp +++ b/lld/COFF/Writer.cpp @@ -1953,7 +1953,8 @@ void Writer::writeSections() { // Fill gaps between functions in .text with INT3 instructions // instead of leaving as NUL bytes (which can be interpreted as // ADD instructions). - if (sec->header.Characteristics & IMAGE_SCN_CNT_CODE) + if ((sec->header.Characteristics & IMAGE_SCN_CNT_CODE) && + (ctx.config.machine == AMD64 || ctx.config.machine == I386)) memset(secBuf, 0xCC, sec->getRawSize()); parallelForEach(sec->chunks, [&](Chunk *c) { c->writeTo(secBuf + c->getRVA() - sec->getRVA()); |