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authorJeff Niu <jeff@modular.com>2022-07-14 13:31:47 -0700
committerJeff Niu <jeff@modular.com>2022-07-14 13:32:13 -0700
commitb7f93c28096fc8503e4d2d80c43ee2c0ccce480f (patch)
tree31597ae54bf43b89ed139d0d8717073ae38ef024 /mlir/lib/Dialect/GPU/Transforms
parentedee61b55cf9f2b57d68ef8bcd8b5dcd3296ecab (diff)
downloadllvm-b7f93c28096fc8503e4d2d80c43ee2c0ccce480f.tar.gz
[mlir] (NFC) run clang-format on all files
Diffstat (limited to 'mlir/lib/Dialect/GPU/Transforms')
-rw-r--r--mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp19
-rw-r--r--mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp26
2 files changed, 21 insertions, 24 deletions
diff --git a/mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp b/mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp
index b33db153c644..e1b1e7e93d65 100644
--- a/mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp
+++ b/mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp
@@ -133,16 +133,15 @@ SerializeToCubinPass::serializeISA(const std::string &isa) {
// Register pass to serialize GPU kernel functions to a CUBIN binary annotation.
void mlir::registerGpuSerializeToCubinPass() {
- PassRegistration<SerializeToCubinPass> registerSerializeToCubin(
- [] {
- // Initialize LLVM NVPTX backend.
- LLVMInitializeNVPTXTarget();
- LLVMInitializeNVPTXTargetInfo();
- LLVMInitializeNVPTXTargetMC();
- LLVMInitializeNVPTXAsmPrinter();
-
- return std::make_unique<SerializeToCubinPass>();
- });
+ PassRegistration<SerializeToCubinPass> registerSerializeToCubin([] {
+ // Initialize LLVM NVPTX backend.
+ LLVMInitializeNVPTXTarget();
+ LLVMInitializeNVPTXTargetInfo();
+ LLVMInitializeNVPTXTargetMC();
+ LLVMInitializeNVPTXAsmPrinter();
+
+ return std::make_unique<SerializeToCubinPass>();
+ });
}
#else // MLIR_GPU_TO_CUBIN_PASS_ENABLE
void mlir::registerGpuSerializeToCubinPass() {}
diff --git a/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp b/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
index 2b0a8ac26710..eb33071dc1ae 100644
--- a/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
+++ b/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
@@ -360,8 +360,7 @@ SerializeToHsacoPass::assembleIsa(const std::string &isa) {
}
llvm::SourceMgr srcMgr;
- srcMgr.AddNewSourceBuffer(llvm::MemoryBuffer::getMemBuffer(isa),
- SMLoc());
+ srcMgr.AddNewSourceBuffer(llvm::MemoryBuffer::getMemBuffer(isa), SMLoc());
const llvm::MCTargetOptions mcOptions;
std::unique_ptr<llvm::MCRegisterInfo> mri(
@@ -469,18 +468,17 @@ SerializeToHsacoPass::serializeISA(const std::string &isa) {
// Register pass to serialize GPU kernel functions to a HSACO binary annotation.
void mlir::registerGpuSerializeToHsacoPass() {
- PassRegistration<SerializeToHsacoPass> registerSerializeToHSACO(
- [] {
- // Initialize LLVM AMDGPU backend.
- LLVMInitializeAMDGPUAsmParser();
- LLVMInitializeAMDGPUAsmPrinter();
- LLVMInitializeAMDGPUTarget();
- LLVMInitializeAMDGPUTargetInfo();
- LLVMInitializeAMDGPUTargetMC();
-
- return std::make_unique<SerializeToHsacoPass>("amdgcn-amd-amdhsa", "",
- "", 2);
- });
+ PassRegistration<SerializeToHsacoPass> registerSerializeToHSACO([] {
+ // Initialize LLVM AMDGPU backend.
+ LLVMInitializeAMDGPUAsmParser();
+ LLVMInitializeAMDGPUAsmPrinter();
+ LLVMInitializeAMDGPUTarget();
+ LLVMInitializeAMDGPUTargetInfo();
+ LLVMInitializeAMDGPUTargetMC();
+
+ return std::make_unique<SerializeToHsacoPass>("amdgcn-amd-amdhsa", "", "",
+ 2);
+ });
}
/// Create an instance of the GPU kernel function to HSAco binary serialization