diff options
Diffstat (limited to 'clang/test/OpenMP/target_reduction_codegen.cpp')
| -rw-r--r-- | clang/test/OpenMP/target_reduction_codegen.cpp | 158 |
1 files changed, 79 insertions, 79 deletions
diff --git a/clang/test/OpenMP/target_reduction_codegen.cpp b/clang/test/OpenMP/target_reduction_codegen.cpp index ad20ac8dd68f..c3bbe54093bc 100644 --- a/clang/test/OpenMP/target_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_reduction_codegen.cpp @@ -1,22 +1,22 @@ // Only test codegen on target side, as private clause does not require any action on the host side // Test target codegen - host bc file has to be created first. -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 - -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s +// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s +// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 + +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics @@ -45,10 +45,10 @@ int foo(int n) { { } - // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(i32*{{.+}} %{{.+}}) - // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}}*, + // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr{{.+}} %{{.+}}) + // TCHECK: [[A:%.+]] = alloca ptr, // TCHECK: store {{.+}}, {{.+}} [[A]], - // TCHECK: load i32*, i32** [[A]], + // TCHECK: load ptr, ptr [[A]], // TCHECK: ret void #pragma omp target reduction(+:a) @@ -56,11 +56,11 @@ int foo(int n) { a = 1; } - // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(i32*{{.+}} %{{.+}}) - // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}}*, + // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr{{.+}} %{{.+}}) + // TCHECK: [[A:%.+]] = alloca ptr, // TCHECK: store {{.+}}, {{.+}} [[A]], - // TCHECK: [[REF:%.+]] = load i32*, i32** [[A]], - // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[REF]], + // TCHECK: [[REF:%.+]] = load ptr, ptr [[A]], + // TCHECK: store i{{[0-9]+}} 1, ptr [[REF]], // TCHECK: ret void #pragma omp target reduction(-:a, aa) @@ -69,15 +69,15 @@ int foo(int n) { aa = 1; } - // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(i32*{{.+}} [[A:%.+]], i16*{{.+}} [[AA:%.+]]) - // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}}*, - // TCHECK: [[AA:%.+]] = alloca i{{[0-9]+}}*, + // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr{{.+}} [[A:%.+]], ptr{{.+}} [[AA:%.+]]) + // TCHECK: [[A:%.+]] = alloca ptr, + // TCHECK: [[AA:%.+]] = alloca ptr, // TCHECK: store {{.+}}, {{.+}} [[A]], // TCHECK: store {{.+}}, {{.+}} [[AA]], - // TCHECK: [[A_REF:%.+]] = load i32*, i32** [[A]], - // TCHECK: [[AA_REF:%.+]] = load i16*, i16** [[AA]], - // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A_REF]], - // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[AA_REF]], + // TCHECK: [[A_REF:%.+]] = load ptr, ptr [[A]], + // TCHECK: [[AA_REF:%.+]] = load ptr, ptr [[AA]], + // TCHECK: store i{{[0-9]+}} 1, ptr [[A_REF]], + // TCHECK: store i{{[0-9]+}} 1, ptr [[AA_REF]], // TCHECK: ret void return a; @@ -118,24 +118,24 @@ int fstatic(int n) { return a; } -// TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(i32*{{.+}}, i16*{{.+}}, i8*{{.+}}, [10 x i32]*{{.+}}) -// TCHECK: [[A:%.+]] = alloca i{{[0-9]+}}*, -// TCHECK: [[A2:%.+]] = alloca i{{[0-9]+}}*, -// TCHECK: [[A3:%.+]] = alloca i{{[0-9]+}}*, -// TCHECK: [[B:%.+]] = alloca [10 x i{{[0-9]+}}]*, +// TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr{{.+}}, ptr{{.+}}, ptr{{.+}}, ptr{{.+}}) +// TCHECK: [[A:%.+]] = alloca ptr, +// TCHECK: [[A2:%.+]] = alloca ptr, +// TCHECK: [[A3:%.+]] = alloca ptr, +// TCHECK: [[B:%.+]] = alloca ptr, // TCHECK: store {{.+}}, {{.+}} [[A]], // TCHECK: store {{.+}}, {{.+}} [[A2]], // TCHECK: store {{.+}}, {{.+}} [[A3]], // TCHECK: store {{.+}}, {{.+}} [[B]], -// TCHECK: [[A_REF:%.+]] = load i32*, i32** [[A]], -// TCHECK: [[AA_REF:%.+]] = load i16*, i16** [[AA]], -// TCHECK: [[A3_REF:%.+]] = load i8*, i8** [[A3]], -// TCHECK: [[B_REF:%.+]] = load {{.+}}*, {{.+}}** [[B]], -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A_REF]], -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[AA_REF]], -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A3_REF]], -// TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], [10 x i{{[0-9]+}}]* [[B_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[B_GEP]], +// TCHECK: [[A_REF:%.+]] = load ptr, ptr [[A]], +// TCHECK: [[AA_REF:%.+]] = load ptr, ptr [[AA]], +// TCHECK: [[A3_REF:%.+]] = load ptr, ptr [[A3]], +// TCHECK: [[B_REF:%.+]] = load ptr, ptr [[B]], +// TCHECK: store i{{[0-9]+}} 1, ptr [[A_REF]], +// TCHECK: store i{{[0-9]+}} 1, ptr [[AA_REF]], +// TCHECK: store i{{[0-9]+}} 1, ptr [[A3_REF]], +// TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], ptr [[B_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 +// TCHECK: store i{{[0-9]+}} 1, ptr [[B_GEP]], // TCHECK: ret void struct S1 { @@ -154,40 +154,40 @@ struct S1 { return c[1][1] + (int)b; } - // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}([[S1]]* noundef [[TH:%.+]], i32*{{.+}}, i{{[0-9]+}} noundef [[VLA:%.+]], i{{[0-9]+}} noundef [[VLA1:%.+]], i16*{{.+}}) - // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, - // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}*, + // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr noundef [[TH:%.+]], ptr{{.+}}, i{{[0-9]+}} noundef [[VLA:%.+]], i{{[0-9]+}} noundef [[VLA1:%.+]], ptr{{.+}}) + // TCHECK: [[TH_ADDR:%.+]] = alloca ptr, + // TCHECK: [[B_ADDR:%.+]] = alloca ptr, // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[VLA_ADDR2:%.+]] = alloca i{{[0-9]+}}, - // TCHECK: [[C_ADDR:%.+]] = alloca i{{[0-9]+}}*, - // TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]], - // TCHECK: store i{{[0-9]+}}* {{.+}}, i{{[0-9]+}}** [[B_ADDR]], - // TCHECK: store i{{[0-9]+}} [[VLA]], i{{[0-9]+}}* [[VLA_ADDR]], - // TCHECK: store i{{[0-9]+}} [[VLA1]], i{{[0-9]+}}* [[VLA_ADDR2]], - // TCHECK: store i{{[0-9]+}}* {{.+}}, i{{[0-9]+}}** [[C_ADDR]], - // TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]], - // TCHECK: [[B_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[B_ADDR]], - // TCHECK: [[VLA_ADDR_REF:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR]], - // TCHECK: [[VLA_ADDR_REF2:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR2]], - // TCHECK: [[C_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[C_ADDR]], + // TCHECK: [[C_ADDR:%.+]] = alloca ptr, + // TCHECK: store ptr [[TH]], ptr [[TH_ADDR]], + // TCHECK: store ptr {{.+}}, ptr [[B_ADDR]], + // TCHECK: store i{{[0-9]+}} [[VLA]], ptr [[VLA_ADDR]], + // TCHECK: store i{{[0-9]+}} [[VLA1]], ptr [[VLA_ADDR2]], + // TCHECK: store ptr {{.+}}, ptr [[C_ADDR]], + // TCHECK: [[TH_ADDR_REF:%.+]] = load ptr, ptr [[TH_ADDR]], + // TCHECK: [[B_REF:%.+]] = load ptr, ptr [[B_ADDR]], + // TCHECK: [[VLA_ADDR_REF:%.+]] = load i{{[0-9]+}}, ptr [[VLA_ADDR]], + // TCHECK: [[VLA_ADDR_REF2:%.+]] = load i{{[0-9]+}}, ptr [[VLA_ADDR2]], + // TCHECK: [[C_REF:%.+]] = load ptr, ptr [[C_ADDR]], // this->a = (double)b + 1.5; - // TCHECK: [[B_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[B_REF]], + // TCHECK: [[B_VAL:%.+]] = load i{{[0-9]+}}, ptr [[B_REF]], // TCHECK: [[B_CONV:%.+]] = sitofp i{{[0-9]+}} [[B_VAL]] to double // TCHECK: [[NEW_A_VAL:%.+]] = fadd double [[B_CONV]], 1.5{{.+}}+00 - // TCHECK: [[A_FIELD:%.+]] = getelementptr inbounds [[S1]], [[S1]]* [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // TCHECK: store double [[NEW_A_VAL]], double* [[A_FIELD]], + // TCHECK: [[A_FIELD:%.+]] = getelementptr inbounds [[S1]], ptr [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // TCHECK: store double [[NEW_A_VAL]], ptr [[A_FIELD]], // c[1][1] = ++a; - // TCHECK: [[A_FIELD4:%.+]] = getelementptr inbounds [[S1]], [[S1]]* [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // TCHECK: [[A_FIELD4_VAL:%.+]] = load double, double* [[A_FIELD4]], + // TCHECK: [[A_FIELD4:%.+]] = getelementptr inbounds [[S1]], ptr [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // TCHECK: [[A_FIELD4_VAL:%.+]] = load double, ptr [[A_FIELD4]], // TCHECK: [[A_FIELD_INC:%.+]] = fadd double [[A_FIELD4_VAL]], 1.0{{.+}}+00 - // TCHECK: store double [[A_FIELD_INC]], double* [[A_FIELD4]], + // TCHECK: store double [[A_FIELD_INC]], ptr [[A_FIELD4]], // TCHECK: [[A_FIELD_INC_CONV:%.+]] = fptosi double [[A_FIELD_INC]] to i{{[0-9]+}} // TCHECK: [[C_IND:%.+]] = mul{{.+}} i{{[0-9]+}} 1, [[VLA_ADDR_REF2]] - // TCHECK: [[C_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, i{{[0-9]+}}* [[C_REF]], i{{[0-9]+}} [[C_IND]] - // TCHECK: [[C_1_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, i{{[0-9]+}}* [[C_1_REF]], i{{[0-9]+}} 1 - // TCHECK: store i{{[0-9]+}} [[A_FIELD_INC_CONV]], i{{[0-9]+}}* [[C_1_1_REF]], + // TCHECK: [[C_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, ptr [[C_REF]], i{{[0-9]+}} [[C_IND]] + // TCHECK: [[C_1_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, ptr [[C_1_REF]], i{{[0-9]+}} 1 + // TCHECK: store i{{[0-9]+}} [[A_FIELD_INC_CONV]], ptr [[C_1_1_REF]], // finish // TCHECK: ret void @@ -206,20 +206,20 @@ int bar(int n){ } // template -// TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(i{{[0-9]+}}*{{.+}}, i{{[0-9]+}}*{{.+}}, [10 x i32]*{{.+}}) -// TCHECK: [[A:%.+]] = alloca i{{[0-9]+}}*, -// TCHECK: [[A2:%.+]] = alloca i{{[0-9]+}}*, -// TCHECK: [[B:%.+]] = alloca [10 x i{{[0-9]+}}]*, +// TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr{{.+}}, ptr{{.+}}, ptr{{.+}}) +// TCHECK: [[A:%.+]] = alloca ptr, +// TCHECK: [[A2:%.+]] = alloca ptr, +// TCHECK: [[B:%.+]] = alloca ptr, // TCHECK: store {{.+}}, {{.+}} [[A]], // TCHECK: store {{.+}}, {{.+}} [[A2]], // TCHECK: store {{.+}}, {{.+}} [[B]], -// TCHECK: [[A_REF:%.+]] = load i32*, i32** [[A]], -// TCHECK: [[AA_REF:%.+]] = load i16*, i16** [[AA]], -// TCHECK: [[B_REF:%.+]] = load {{.+}}*, {{.+}}** [[B]], -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A_REF]], -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[AA_REF]], -// TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], [10 x i{{[0-9]+}}]* [[B_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 -// TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[B_GEP]], +// TCHECK: [[A_REF:%.+]] = load ptr, ptr [[A]], +// TCHECK: [[AA_REF:%.+]] = load ptr, ptr [[AA]], +// TCHECK: [[B_REF:%.+]] = load ptr, ptr [[B]], +// TCHECK: store i{{[0-9]+}} 1, ptr [[A_REF]], +// TCHECK: store i{{[0-9]+}} 1, ptr [[AA_REF]], +// TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], ptr [[B_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 +// TCHECK: store i{{[0-9]+}} 1, ptr [[B_GEP]], // TCHECK: ret void #endif |