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Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.h')
-rw-r--r--llvm/lib/Target/AMDGPU/SIRegisterInfo.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 96bef205b847..4d7484d1133a 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -22,6 +22,7 @@ namespace llvm {
class GCNSubtarget;
class LiveIntervals;
class RegisterBank;
+struct SGPRSpillBuilder;
class SIMachineFunctionInfo;
class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
@@ -106,10 +107,11 @@ public:
const TargetRegisterClass *getPointerRegClass(
const MachineFunction &MF, unsigned Kind = 0) const override;
- void buildSGPRSpillLoadStore(MachineBasicBlock::iterator MI, int Index,
- int Offset, unsigned EltSize, Register VGPR,
- int64_t VGPRLanes, RegScavenger *RS,
- bool IsLoad) const;
+ void buildVGPRSpillLoadStore(SGPRSpillBuilder &SB, int Index, int Offset,
+ bool IsLoad, bool IsKill = true) const;
+
+ void buildSGPRSpillLoadStore(SGPRSpillBuilder &SB, int Offset,
+ int64_t VGPRLanes) const;
/// If \p OnlyToVGPR is true, this will only succeed if this
bool spillSGPR(MachineBasicBlock::iterator MI,