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| author | Mike Pall <mike> | 2012-08-27 20:25:54 +0200 |
|---|---|---|
| committer | Mike Pall <mike> | 2012-08-27 20:25:54 +0200 |
| commit | 30f458fb4d8bab4096d74ed62d621110ca16e881 (patch) | |
| tree | 22a2acde2d57772ce3912c2e169e4f51ec161b2f /src/lj_asm_mips.h | |
| parent | 1e477e648795e7c93460ae420eb541a15361b780 (diff) | |
| download | luajit2-30f458fb4d8bab4096d74ed62d621110ca16e881.tar.gz | |
ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting.
Diffstat (limited to 'src/lj_asm_mips.h')
| -rw-r--r-- | src/lj_asm_mips.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index 3de133b8..d6bd8ca0 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h @@ -187,7 +187,7 @@ static void asm_fusexref(ASMState *as, MIPSIns mi, Reg rt, IRRef ref, { IRIns *ir = IR(ref); Reg base; - if (ra_noreg(ir->r) && mayfuse(as, ref)) { + if (ra_noreg(ir->r) && canfuse(as, ir)) { if (ir->o == IR_ADD) { int32_t ofs2; if (irref_isk(ir->op2) && (ofs2 = ofs + IR(ir->op2)->i, checki16(ofs2))) { |