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author | Mike Pall <mike> | 2013-02-28 17:52:31 +0100 |
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committer | Mike Pall <mike> | 2013-02-28 17:52:31 +0100 |
commit | 78c97bc5a1529b0e21d417011ddb956c08a4643e (patch) | |
tree | 97ebe6504a2b9cafe6839945df5f4fb927398641 /src/lj_asm_mips.h | |
parent | 3e286c1e72651f91a2f4ca5b1fa2f366ac4cd0fa (diff) | |
download | luajit2-78c97bc5a1529b0e21d417011ddb956c08a4643e.tar.gz |
MIPS: Fix cache flush/sync for JIT-compiled code jump area.
Diffstat (limited to 'src/lj_asm_mips.h')
-rw-r--r-- | src/lj_asm_mips.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index cd283b88..e80f7582 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h @@ -71,6 +71,7 @@ static void asm_sparejump_setup(ASMState *as) memset(mxp+2, 0, MIPS_SPAREJUMP*8); mxp += MIPS_SPAREJUMP*2; lua_assert(mxp < as->mctop); + lj_mcode_sync(as->mcbot, mxp); lj_mcode_commitbot(as->J, mxp); as->mcbot = mxp; as->mclim = as->mcbot + MCLIM_REDZONE; |