Disable aarch64 hw crc32 function for now

Also re-adds the start time detection of intel instruction.

I never got a proper test platform for the ARM bits and it's been stuck
as a configure flag. I'd be happy to add it back if that situation
changes.

4 files changed, 25 insertions, 11 deletions

diff --git a/configure.ac b/configure.ac
index b192e60..ffc98b2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -82,8 +82,10 @@ fi
 AM_PROG_CC_C_O
 AC_PROG_INSTALL
 
-AC_ARG_ENABLE(arm_crc32,
-  [AS_HELP_STRING([--enable-arm-crc32], [Enable ARMv8 CRC32 instructions])])
+dnl ARM crc32 optimization is disabled until we have hardware for an automated
+dnl regression test.
+dnl AC_ARG_ENABLE(arm_crc32,
+dnl  [AS_HELP_STRING([--enable-arm-crc32], [Enable ARMv8 CRC32 instructions])])
 
 AC_ARG_ENABLE(extstore,
   [AS_HELP_STRING([--disable-extstore], [Disable external storage (extstore)])])
diff --git a/crc32c.c b/crc32c.c
index 4d413bf..a516e24 100644
--- a/crc32c.c
+++ b/crc32c.c
@@ -43,9 +43,12 @@
 #include <pthread.h>
 #include "crc32c.h"
 
+crc_func crc32c;
+
 /* CRC-32C (iSCSI) polynomial in reversed bit order. */
 #define POLY 0x82f63b78
 
+uint32_t crc32c_sw(uint32_t crc, void const *buf, size_t len);
 uint32_t crc32c_sw_little(uint32_t crc, void const *buf, size_t len);
 uint32_t crc32c_sw_big(uint32_t crc, void const *buf, size_t len);
 #ifdef __x86_64__
@@ -260,17 +263,21 @@ static uint32_t crc32c_hw(uint32_t crc, void const *buf, size_t len) {
 
 /* Compute a CRC-32C.  If the crc32 instruction is available, use the hardware
    version.  Otherwise, use the software version. */
-uint32_t crc32c(uint32_t crc, void const *buf, size_t len) {
+void crc32c_init(void) {
     int sse42;
 
     SSE42(sse42);
-    return sse42 ? crc32c_hw(crc, buf, len) : crc32c_sw(crc, buf, len);
+    if (sse42) {
+        crc32c = crc32c_hw;
+    } else {
+        crc32c = crc32c_sw;
+    }
 }
 
 #else /* !__x86_64__ */
 
-uint32_t crc32c(uint32_t crc, void const *buf, size_t len) {
-    return crc32c_sw(crc, buf, len);
+void crc32c_init(void) {
+    crc32c = crc32c_sw;
 }
 
 #endif
diff --git a/crc32c.h b/crc32c.h
index a403bd5..10ffd4f 100644
--- a/crc32c.h
+++ b/crc32c.h
@@ -1,3 +1,7 @@
+#ifndef CRC32C_H
+#define    CRC32C_H
+
+
 // crc32c.h -- header for crc32c.c
 // Copyright (C) 2015 Mark Adler
 // See crc32c.c for the license.
@@ -8,8 +12,9 @@
 // used to calculate the CRC of a sequence of bytes a chunk at a time, using
 // the previously returned crc in the next call.  The first call must be with
 // crc == 0.  crc32c() uses the Intel crc32 hardware instruction if available.
-uint32_t crc32c(uint32_t crc, void const *buf, size_t len);
+typedef uint32_t (*crc_func)(uint32_t crc, const void *buf, size_t len);
+extern crc_func crc32c;
+
+void crc32c_init(void);
 
-// crc32c_sw() is the same, but does not use the hardware instruction, even if
-// available.
-uint32_t crc32c_sw(uint32_t crc, void const *buf, size_t len);
+#endif    /* CRC32C_H */
diff --git a/memcached.c b/memcached.c
index 3e7d4c6..1da53d0 100644
--- a/memcached.c
+++ b/memcached.c
@@ -10103,7 +10103,7 @@ int main (int argc, char **argv) {
             settings.ext_drop_under = storage_file->page_count / 4;
         }
         // FIXME: temporarily removed.
-        //crc32c_init();
+        crc32c_init();
         /* Init free chunks to zero. */
         for (int x = 0; x < MAX_NUMBER_OF_SLAB_CLASSES; x++) {
             settings.ext_free_memchunks[x] = 0;