diff options
| author | dormando <dormando@rydia.net> | 2018-05-23 15:54:52 -0700 |
|---|---|---|
| committer | dormando <dormando@rydia.net> | 2018-05-23 15:56:37 -0700 |
| commit | cf3b8538cf22eb014ae557330ac8720b254c82b5 (patch) | |
| tree | 64ce46497ca126aa002d3333bb277959684186de | |
| parent | 3d41969087bde49f22aad92eaabb675532b8f73a (diff) | |
| download | memcached-cf3b8538cf22eb014ae557330ac8720b254c82b5.tar.gz | |
gate arm crc32 behind --enable-arm-crc32
users also need to add CFLAGS="-march=armv8-a+crc" if they have actual
aarch64 platforms.
| -rw-r--r-- | configure.ac | 10 | ||||
| -rw-r--r-- | crc32c.c | 5 |
2 files changed, 12 insertions, 3 deletions
diff --git a/configure.ac b/configure.ac index 19eb279..6399502 100644 --- a/configure.ac +++ b/configure.ac @@ -82,6 +82,9 @@ fi AM_PROG_CC_C_O AC_PROG_INSTALL +AC_ARG_ENABLE(arm_crc32, + [AS_HELP_STRING([--enable-arm-crc32], [Enable ARMv8 CRC32 instructions])]) + AC_ARG_ENABLE(extstore, [AS_HELP_STRING([--enable-extstore], [Enable external storage EXPERIMENTAL ])]) @@ -184,13 +187,18 @@ if test "x$enable_dtrace" = "xyes"; then fi if test "x$enable_extstore" = "xyes"; then - AC_DEFINE([EXTSTORE],1,[Set to nonzero if you want to enable extstorextstore]) + AC_DEFINE([EXTSTORE],1,[Set to nonzero if you want to enable extstore]) +fi + +if test "x$enable_arm_crc32" = "xyes"; then + AC_DEFINE([ARM_CRC32],1,[Set to nonzero if you want to enable ARMv8 crc32]) fi AM_CONDITIONAL([BUILD_DTRACE],[test "$build_dtrace" = "yes"]) AM_CONDITIONAL([DTRACE_INSTRUMENT_OBJ],[test "$dtrace_instrument_obj" = "yes"]) AM_CONDITIONAL([ENABLE_SASL],[test "$enable_sasl" = "yes"]) AM_CONDITIONAL([ENABLE_EXTSTORE],[test "$enable_extstore" = "yes"]) +AM_CONDITIONAL([ENABLE_ARM_CRC32],[test "$enable_arm_crc32" = "yes"]) AC_SUBST(DTRACE) AC_SUBST(DTRACEFLAGS) @@ -40,6 +40,7 @@ #include <stdint.h> #include <unistd.h> #include <pthread.h> +#include "config.h" #if defined(__linux__) && defined(__aarch64__) #include <sys/auxv.h> #endif @@ -113,7 +114,7 @@ static uint32_t crc32c_sw(uint32_t crci, const void *buf, size_t len) } /* Hardware CRC support for aarch64 platform */ -#if defined(__linux__) && defined(__aarch64__) +#if defined(__linux__) && defined(__aarch64__) && defined(ARM_CRC32) #define CRC32CX(crc, value) __asm__("crc32cx %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(+value)) #define CRC32CW(crc, value) __asm__("crc32cw %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(+value)) @@ -399,7 +400,7 @@ void crc32c_init(void) { } else #endif /* Check if CRC instructions supported by aarch64 */ - #if defined(__linux__) && defined(__aarch64__) + #if defined(__linux__) && defined(__aarch64__) && defined(ARM_CRC32) unsigned long hwcap = getauxval(AT_HWCAP); if (hwcap & HWCAP_CRC32) { |