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authorPatrick Lerda <patrick9876@free.fr>2023-04-25 16:47:23 +0200
committerEric Engestrom <eric@engestrom.ch>2023-05-10 12:40:07 +0100
commit8d8c01f6716dfcc9be2140ad9793269323afeb0d (patch)
tree7c4a48bf828489b2eac59c951fe761130b8be9c9
parenteaf658e3f4456849d53cf975fafe46a4be7dce98 (diff)
downloadmesa-8d8c01f6716dfcc9be2140ad9793269323afeb0d.tar.gz
radeonsi: set proper drm_amdgpu_cs_chunk_fence alignment
The 'struct drm_amdgpu_cs_chunk_fence' is processed as 'struct drm_amdgpu_cs_chunk_data' which is a union. This change ensures the proper alignment for this structure to be processed as 'struct drm_amdgpu_cs_chunk_data'. The presence of __u64 as one member of 'struct drm_amdgpu_cs_chunk_data' makes the whole structure expected to be 64-bit aligned. This is a minor issue detected by the gcc sanitizer (ubsan), for instance at the libdrm library: ../amdgpu/amdgpu_cs.c:937:26: runtime error: member access within misaligned address 0x63100001484c for type 'struct drm_amdgpu_cs_chunk_data', which requires 8 byte alignment 0x63100001484c: note: pointer points here 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ^ Fixes: ae7e4d7619e0 ("amd: rename ring_type --> amd_ip_type and match the kernel enum values") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22920> (cherry picked from commit acdd6a2a6c3882ef6fa3acf612f9d55eaf55583e)
-rw-r--r--.pick_status.json2
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.h6
2 files changed, 6 insertions, 2 deletions
diff --git a/.pick_status.json b/.pick_status.json
index d4cd0eba78d..d3351752ebb 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -265,7 +265,7 @@
"description": "radeonsi: set proper drm_amdgpu_cs_chunk_fence alignment",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 1,
"main_sha": null,
"because_sha": "ae7e4d7619e0f9aad41aac5424b051f8826afba1"
},
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index 13b8bf73d4f..022e45253fd 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -131,8 +131,12 @@ struct amdgpu_cs {
struct amdgpu_ib main; /* must be first because this is inherited */
struct amdgpu_winsys *ws;
struct amdgpu_ctx *ctx;
- enum amd_ip_type ip_type;
+
+ /*
+ * Ensure a 64-bit alignment for drm_amdgpu_cs_chunk_fence.
+ */
struct drm_amdgpu_cs_chunk_fence fence_chunk;
+ enum amd_ip_type ip_type;
/* We flip between these two CS. While one is being consumed
* by the kernel in another thread, the other one is being filled