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path: root/src/freedreno/ir3/ir3_compiler.c
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* ir3, freedreno: implement GL_ARB_shader_draw_parametersAmber2023-05-171-0/+4
* freedreno+ir3: Move storage_16bit to compiler optionsRob Clark2023-02-071-2/+0
* freedreno/ir3: Stop copying optionsRob Clark2023-01-181-3/+1
* freedreno/ir3: Switch to NIR for a5xx's vertex id lowering.Jami Kettunen2022-10-241-1/+1
* freedreno/ir3: Lower all the 64bRob Clark2022-10-191-3/+1
* freedreno/ir3: Switch to NIR for a3xx/a4xx's vertex id lowering.Emma Anholt2022-08-311-4/+4
* freedreno/ir3: Move chip-specific nir compiler options to C code.Emma Anholt2022-08-311-73/+60
* ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal.Emma Anholt2022-08-171-0/+1
* ir3: handle shared consts.Hyunjun Ko2022-07-241-0/+4
* ir3: change maximum size of const files.Hyunjun Ko2022-07-241-4/+11
* freedreno/ir3: Enable core NIR's 16-bit ALU optimizations.Emma Anholt2022-07-181-0/+6
* freedreno: switch to NIR loop unrollingTimothy Arceri2022-06-041-2/+5
* freedreno/ir3: tidy up duplication of common nir optionsTimothy Arceri2022-06-041-90/+49
* freedreno/ir3: Enable load/store vectorization for SSBO access, too.Emma Anholt2022-06-011-1/+1
* gallium/drivers: set force_indirect_unrolling_sampler for all required driversTimothy Arceri2022-05-171-0/+2
* ir3: Support disabling the pipeline cacheConnor Abbott2022-05-131-1/+2
* ir3, turnip: Use ldc.k to push UBOsConnor Abbott2022-03-171-0/+6
* ir3: Refactor ir3_compiler_create() to take an options structConnor Abbott2022-03-171-6/+6
* ir3: Add preamble optimization passConnor Abbott2022-03-171-0/+3
* nir: Fix lowering terminology of compute system values: "from"->"to".Timur Kristóf2022-03-081-2/+2
* freedreno/ir3: support a4xx compute differencesIlia Mirkin2022-03-051-0/+1
* tu,ir3: Implement VK_KHR_shader_integer_dot_productDanylo Piliaiev2022-01-101-8/+13
* ir3: Make nir compiler options a part of ir3_compilerDanylo Piliaiev2022-01-101-0/+127
* ir3: Be able to reduce register limit for RA when CS has barriersDanylo Piliaiev2022-01-071-0/+2
* ir3: Use getfiberid for SubgroupInvocationID on gen4Danylo Piliaiev2021-12-071-0/+3
* freedreno/ir3: 16b boolsRob Clark2021-10-211-0/+2
* ir3/a6xx,freedreno: account for resinfo return size dependency on IBO_0_FMTDanylo Piliaiev2021-09-011-0/+3
* ir3: Initial support for spilling non-shared registersConnor Abbott2021-08-201-0/+1
* freedreno/all: Introduce fd_dev_idRob Clark2021-08-061-5/+5
* freedreno/ir3: Reduce use of compiler->gpu_idRob Clark2021-08-061-6/+7
* freedreno/ir3: Get reg_size_vec4 from fd_dev_infoRob Clark2021-07-141-7/+3
* freedreno/ir3: Get tess_use_shared from fd_dev_infoRob Clark2021-07-141-2/+4
* ir3: Reformat source with clang-formatConnor Abbott2021-07-121-120/+123
* ir3: Manually reformat some placesConnor Abbott2021-07-121-16/+18
* ir3: Rewrite register allocationConnor Abbott2021-06-101-2/+0
* ir3, tu: Add compiler flag for robust UBO behaviorConnor Abbott2021-04-151-1/+2
* ir3: Calcuate max_waves and threadsizeConnor Abbott2021-03-221-0/+35
* ir3: add debug option to override shader assemblyDanylo Piliaiev2021-01-141-0/+8
* freedreno/ir3: Don't leak disk_cacheRob Clark2021-01-061-0/+1
* ir3: Enable nir_lower_vars_to_scratch on a6xxConnor Abbott2020-11-191-0/+3
* freedreno/a6xx: Implement user clip/cull distancesConnor Abbott2020-10-231-0/+3
* freedreno/ir3: Clean up instrlen setup.Eric Anholt2020-08-051-0/+2
* freedreno/ir3: add support for a650 tess shared storageJonathan Marek2020-07-081-0/+3
* freedreno/ir3: disk-cache supportRob Clark2020-06-261-0/+3
* freedreno/ir3: add ir3_compiler_destroy()Rob Clark2020-06-261-1/+8
* ir3: Support variants with different constlen'sConnor Abbott2020-06-261-5/+30
* freedreno/ir3: decouple regset from gpu genRob Clark2020-06-181-1/+2
* freedreno/ir3: Drop the max_const on a6xx to 512.Eric Anholt2020-06-051-1/+4
* freedreno/a3xx: parameterize ubo optimizationIlia Mirkin2020-05-171-0/+4
* freedreno/ir3/ra: add debug option for RA debug msgsRob Clark2020-03-271-1/+3
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